Investigation of stress induced interface states in Al2O3/InGaAs metal-oxide-semiconductor capacitors

• Autores: Palumbo, Félix Roberto Mario; Winter, R.; Tang, K.; McIntyre, P. C.; Eizenberg, M.
• Año de publicación: 2017
• Idioma: inglés
• Tipo de recurso: artículo
• Materia: InGaAs; High-k dielectrics; High-k / III-V interface defects
• Institución: Consejo Nacional de Investigaciones Científicas y Técnicas

Implementation of high-k dielectrics on InGaAs for CMOS technology requires capabilities to predict long-time degradation and the impact of process changes on degradation processes. In this work, the degradation under constant voltage stress of metal gate/Al2O3/InGaAs stacks is studied for n-type and p-type As2 passivated InGaAs substrates. The results show that the degradation for both positive bias and negative bias did not produce Al2O3 oxide traps, while the distribution of interface states increased. In particular, the distribution of interface states, calculated by the distributed impedance equivalent circuit model, increased significantly after positive bias stress regardless of the doping type of the substrate. The injection of carriers from the semiconductor conduction band into the gate dielectric enhanced the generation of interface states but not the generation of oxide traps, suggesting that the interfacial degradation is related primarily to the InGaAs surface and not to the oxide layer.
Fil: Palumbo, Félix Roberto Mario. Consejo Nacional de Investigaciones Científicas y Técnicas; Argentina. Universidad Tecnologica Nacional; Argentina
Fil: Winter, R.. Technion - Israel Institute of Technology; Israel
Fil: Tang, K.. University Of Stanford; Estados Unidos
Fil: McIntyre, P. C.. University Of Stanford; Estados Unidos
Fil: Eizenberg, M.. Technion - Israel Institute of Technology; Israel