Hardware radial basis function neural network automatic generation
- Autores
- Leiva, Lucas; Acosta, Nelson
- Año de publicación
- 2011
- Idioma
- inglés
- Tipo de recurso
- artículo
- Estado
- versión publicada
- Descripción
- This paper presents a parallel architecture for a radial basis function (RBF) neural network used for pattern recognition. This architecture allows defining sub-networks which can be activated sequentially. It can be used as a fruitful classification mechanism in many application fields. Several implementations of the network on a Xilinx FPGA Virtex 4-(xc4vsx25) are presented, with speed and area evaluation metrics. Some network improvements have been achieved by segmenting the critical path. The results expressed in terms of speed and area are satisfactory and have been applied to pattern recognition problems.
Facultad de Informática - Materia
-
Ciencias Informáticas
PATTERN RECOGNITION
Redes Neurales (Computación)
Parallel Architectures - Nivel de accesibilidad
- acceso abierto
- Condiciones de uso
- http://creativecommons.org/licenses/by-nc/3.0/
- Repositorio
.jpg)
- Institución
- Universidad Nacional de La Plata
- OAI Identificador
- oai:sedici.unlp.edu.ar:10915/9690
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Hardware radial basis function neural network automatic generationLeiva, LucasAcosta, NelsonCiencias InformáticasPATTERN RECOGNITIONRedes Neurales (Computación)Parallel ArchitecturesThis paper presents a parallel architecture for a radial basis function (RBF) neural network used for pattern recognition. This architecture allows defining sub-networks which can be activated sequentially. It can be used as a fruitful classification mechanism in many application fields. Several implementations of the network on a Xilinx FPGA Virtex 4-(xc4vsx25) are presented, with speed and area evaluation metrics. Some network improvements have been achieved by segmenting the critical path. The results expressed in terms of speed and area are satisfactory and have been applied to pattern recognition problems.Facultad de Informática2011-04info:eu-repo/semantics/articleinfo:eu-repo/semantics/publishedVersionArticulohttp://purl.org/coar/resource_type/c_6501info:ar-repo/semantics/articuloapplication/pdf15-20http://sedici.unlp.edu.ar/handle/10915/9690enginfo:eu-repo/semantics/altIdentifier/url/http://journal.info.unlp.edu.ar/wp-content/uploads/JCST-Apr11-3.pdfinfo:eu-repo/semantics/altIdentifier/issn/1666-6038info:eu-repo/semantics/openAccesshttp://creativecommons.org/licenses/by-nc/3.0/Creative Commons Attribution-NonCommercial 3.0 Unported (CC BY-NC 3.0)reponame:SEDICI (UNLP)instname:Universidad Nacional de La Platainstacron:UNLP2025-09-03T10:23:39Zoai:sedici.unlp.edu.ar:10915/9690Institucionalhttp://sedici.unlp.edu.ar/Universidad públicaNo correspondehttp://sedici.unlp.edu.ar/oai/snrdalira@sedici.unlp.edu.arArgentinaNo correspondeNo correspondeNo correspondeopendoar:13292025-09-03 10:23:39.273SEDICI (UNLP) - Universidad Nacional de La Platafalse |
| dc.title.none.fl_str_mv |
Hardware radial basis function neural network automatic generation |
| title |
Hardware radial basis function neural network automatic generation |
| spellingShingle |
Hardware radial basis function neural network automatic generation Leiva, Lucas Ciencias Informáticas PATTERN RECOGNITION Redes Neurales (Computación) Parallel Architectures |
| title_short |
Hardware radial basis function neural network automatic generation |
| title_full |
Hardware radial basis function neural network automatic generation |
| title_fullStr |
Hardware radial basis function neural network automatic generation |
| title_full_unstemmed |
Hardware radial basis function neural network automatic generation |
| title_sort |
Hardware radial basis function neural network automatic generation |
| dc.creator.none.fl_str_mv |
Leiva, Lucas Acosta, Nelson |
| author |
Leiva, Lucas |
| author_facet |
Leiva, Lucas Acosta, Nelson |
| author_role |
author |
| author2 |
Acosta, Nelson |
| author2_role |
author |
| dc.subject.none.fl_str_mv |
Ciencias Informáticas PATTERN RECOGNITION Redes Neurales (Computación) Parallel Architectures |
| topic |
Ciencias Informáticas PATTERN RECOGNITION Redes Neurales (Computación) Parallel Architectures |
| dc.description.none.fl_txt_mv |
This paper presents a parallel architecture for a radial basis function (RBF) neural network used for pattern recognition. This architecture allows defining sub-networks which can be activated sequentially. It can be used as a fruitful classification mechanism in many application fields. Several implementations of the network on a Xilinx FPGA Virtex 4-(xc4vsx25) are presented, with speed and area evaluation metrics. Some network improvements have been achieved by segmenting the critical path. The results expressed in terms of speed and area are satisfactory and have been applied to pattern recognition problems. Facultad de Informática |
| description |
This paper presents a parallel architecture for a radial basis function (RBF) neural network used for pattern recognition. This architecture allows defining sub-networks which can be activated sequentially. It can be used as a fruitful classification mechanism in many application fields. Several implementations of the network on a Xilinx FPGA Virtex 4-(xc4vsx25) are presented, with speed and area evaluation metrics. Some network improvements have been achieved by segmenting the critical path. The results expressed in terms of speed and area are satisfactory and have been applied to pattern recognition problems. |
| publishDate |
2011 |
| dc.date.none.fl_str_mv |
2011-04 |
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article |
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publishedVersion |
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http://sedici.unlp.edu.ar/handle/10915/9690 |
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http://sedici.unlp.edu.ar/handle/10915/9690 |
| dc.language.none.fl_str_mv |
eng |
| language |
eng |
| dc.relation.none.fl_str_mv |
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openAccess |
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application/pdf 15-20 |
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