Reducing the LSQ and L1 data cache power consumption
- Autores
- Apolloni, Rubén; Carazo, P.; Castro, Fernando; Chaver, Daniel; Piñuel, Luis; Tirado Fernández, Francisco
- Año de publicación
- 2010
- Idioma
- español castellano
- Tipo de recurso
- documento de conferencia
- Estado
- versión publicada
- Descripción
- In most modern processor designs, the HW dedicated to store data and instructions (memory hierarchy) has become a major consumer of power. In order to reduce this power consumption, we propose in this paper two techniques, one to filter accesses to the LSQ (Load-Store Queue) based on both timing and address information, and the other to filter accesses to the first level data cache based on a forwarding predictor. Our simulation results show that the power consumption decreases in 30-40% in each structure, with a negligible performance penalty of less than 0.1%.
Presentado en el V Workshop Arquitectura, Redes y Sistemas Operativos (WARSO)
Red de Universidades con Carreras en Informática (RedUNCI) - Materia
-
Ciencias Informáticas
sistema operativo
data
System architectures
LSQ
filter accesses - Nivel de accesibilidad
- acceso abierto
- Condiciones de uso
- http://creativecommons.org/licenses/by-nc-sa/2.5/ar/
- Repositorio
.jpg)
- Institución
- Universidad Nacional de La Plata
- OAI Identificador
- oai:sedici.unlp.edu.ar:10915/19346
Ver los metadatos del registro completo
| id |
SEDICI_9aa606830e369bb1c8c98e38895b6178 |
|---|---|
| oai_identifier_str |
oai:sedici.unlp.edu.ar:10915/19346 |
| network_acronym_str |
SEDICI |
| repository_id_str |
1329 |
| network_name_str |
SEDICI (UNLP) |
| spelling |
Reducing the LSQ and L1 data cache power consumptionApolloni, RubénCarazo, P.Castro, FernandoChaver, DanielPiñuel, LuisTirado Fernández, FranciscoCiencias Informáticassistema operativodataSystem architecturesLSQfilter accessesIn most modern processor designs, the HW dedicated to store data and instructions (memory hierarchy) has become a major consumer of power. In order to reduce this power consumption, we propose in this paper two techniques, one to filter accesses to the LSQ (Load-Store Queue) based on both timing and address information, and the other to filter accesses to the first level data cache based on a forwarding predictor. Our simulation results show that the power consumption decreases in 30-40% in each structure, with a negligible performance penalty of less than 0.1%.Presentado en el V Workshop Arquitectura, Redes y Sistemas Operativos (WARSO)Red de Universidades con Carreras en Informática (RedUNCI)2010-10info:eu-repo/semantics/conferenceObjectinfo:eu-repo/semantics/publishedVersionObjeto de conferenciahttp://purl.org/coar/resource_type/c_5794info:ar-repo/semantics/documentoDeConferenciaapplication/pdf764-773http://sedici.unlp.edu.ar/handle/10915/19346spainfo:eu-repo/semantics/altIdentifier/isbn/978-950-9474-49-9info:eu-repo/semantics/openAccesshttp://creativecommons.org/licenses/by-nc-sa/2.5/ar/Creative Commons Attribution-NonCommercial-ShareAlike 2.5 Argentina (CC BY-NC-SA 2.5)reponame:SEDICI (UNLP)instname:Universidad Nacional de La Platainstacron:UNLP2025-10-22T16:35:26Zoai:sedici.unlp.edu.ar:10915/19346Institucionalhttp://sedici.unlp.edu.ar/Universidad públicaNo correspondehttp://sedici.unlp.edu.ar/oai/snrdalira@sedici.unlp.edu.arArgentinaNo correspondeNo correspondeNo correspondeopendoar:13292025-10-22 16:35:26.816SEDICI (UNLP) - Universidad Nacional de La Platafalse |
| dc.title.none.fl_str_mv |
Reducing the LSQ and L1 data cache power consumption |
| title |
Reducing the LSQ and L1 data cache power consumption |
| spellingShingle |
Reducing the LSQ and L1 data cache power consumption Apolloni, Rubén Ciencias Informáticas sistema operativo data System architectures LSQ filter accesses |
| title_short |
Reducing the LSQ and L1 data cache power consumption |
| title_full |
Reducing the LSQ and L1 data cache power consumption |
| title_fullStr |
Reducing the LSQ and L1 data cache power consumption |
| title_full_unstemmed |
Reducing the LSQ and L1 data cache power consumption |
| title_sort |
Reducing the LSQ and L1 data cache power consumption |
| dc.creator.none.fl_str_mv |
Apolloni, Rubén Carazo, P. Castro, Fernando Chaver, Daniel Piñuel, Luis Tirado Fernández, Francisco |
| author |
Apolloni, Rubén |
| author_facet |
Apolloni, Rubén Carazo, P. Castro, Fernando Chaver, Daniel Piñuel, Luis Tirado Fernández, Francisco |
| author_role |
author |
| author2 |
Carazo, P. Castro, Fernando Chaver, Daniel Piñuel, Luis Tirado Fernández, Francisco |
| author2_role |
author author author author author |
| dc.subject.none.fl_str_mv |
Ciencias Informáticas sistema operativo data System architectures LSQ filter accesses |
| topic |
Ciencias Informáticas sistema operativo data System architectures LSQ filter accesses |
| dc.description.none.fl_txt_mv |
In most modern processor designs, the HW dedicated to store data and instructions (memory hierarchy) has become a major consumer of power. In order to reduce this power consumption, we propose in this paper two techniques, one to filter accesses to the LSQ (Load-Store Queue) based on both timing and address information, and the other to filter accesses to the first level data cache based on a forwarding predictor. Our simulation results show that the power consumption decreases in 30-40% in each structure, with a negligible performance penalty of less than 0.1%. Presentado en el V Workshop Arquitectura, Redes y Sistemas Operativos (WARSO) Red de Universidades con Carreras en Informática (RedUNCI) |
| description |
In most modern processor designs, the HW dedicated to store data and instructions (memory hierarchy) has become a major consumer of power. In order to reduce this power consumption, we propose in this paper two techniques, one to filter accesses to the LSQ (Load-Store Queue) based on both timing and address information, and the other to filter accesses to the first level data cache based on a forwarding predictor. Our simulation results show that the power consumption decreases in 30-40% in each structure, with a negligible performance penalty of less than 0.1%. |
| publishDate |
2010 |
| dc.date.none.fl_str_mv |
2010-10 |
| dc.type.none.fl_str_mv |
info:eu-repo/semantics/conferenceObject info:eu-repo/semantics/publishedVersion Objeto de conferencia http://purl.org/coar/resource_type/c_5794 info:ar-repo/semantics/documentoDeConferencia |
| format |
conferenceObject |
| status_str |
publishedVersion |
| dc.identifier.none.fl_str_mv |
http://sedici.unlp.edu.ar/handle/10915/19346 |
| url |
http://sedici.unlp.edu.ar/handle/10915/19346 |
| dc.language.none.fl_str_mv |
spa |
| language |
spa |
| dc.relation.none.fl_str_mv |
info:eu-repo/semantics/altIdentifier/isbn/978-950-9474-49-9 |
| dc.rights.none.fl_str_mv |
info:eu-repo/semantics/openAccess http://creativecommons.org/licenses/by-nc-sa/2.5/ar/ Creative Commons Attribution-NonCommercial-ShareAlike 2.5 Argentina (CC BY-NC-SA 2.5) |
| eu_rights_str_mv |
openAccess |
| rights_invalid_str_mv |
http://creativecommons.org/licenses/by-nc-sa/2.5/ar/ Creative Commons Attribution-NonCommercial-ShareAlike 2.5 Argentina (CC BY-NC-SA 2.5) |
| dc.format.none.fl_str_mv |
application/pdf 764-773 |
| dc.source.none.fl_str_mv |
reponame:SEDICI (UNLP) instname:Universidad Nacional de La Plata instacron:UNLP |
| reponame_str |
SEDICI (UNLP) |
| collection |
SEDICI (UNLP) |
| instname_str |
Universidad Nacional de La Plata |
| instacron_str |
UNLP |
| institution |
UNLP |
| repository.name.fl_str_mv |
SEDICI (UNLP) - Universidad Nacional de La Plata |
| repository.mail.fl_str_mv |
alira@sedici.unlp.edu.ar |
| _version_ |
1846782800912449536 |
| score |
12.982451 |