Memory disambiguation hardware: a review

Autores
Castro, Fernando; Chaver, Daniel; Piñuel, Luis; Prieto, Manuel; Tirado Fernández, Francisco
Año de publicación
2008
Idioma
inglés
Tipo de recurso
artículo
Estado
versión publicada
Descripción
One of the main challenges of modern processor designs is the implementation of scalable and efficient mechanisms to detect memory access order violations as a result of out-of-order execution. Conventional structures performing this task are complex, inefficient and power-hungry. This fact has generated a large body of work on optimizing address-based memory disambiguation logic, namely the load-store queue. In this paper we review the most significant proposals in this research field, focusing on our own contributions.
Facultad de Informática
Materia
Ciencias Informáticas
Filtering
LSQ
memory disambiguation
energy-efficiency
Nivel de accesibilidad
acceso abierto
Condiciones de uso
http://creativecommons.org/licenses/by-nc/3.0/
Repositorio
SEDICI (UNLP)
Institución
Universidad Nacional de La Plata
OAI Identificador
oai:sedici.unlp.edu.ar:10915/9636
Acceder
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oai_identifier_str oai:sedici.unlp.edu.ar:10915/9636
network_acronym_str SEDICI
repository_id_str 1329
network_name_str SEDICI (UNLP)
spelling Memory disambiguation hardware: a reviewCastro, FernandoChaver, DanielPiñuel, LuisPrieto, ManuelTirado Fernández, FranciscoCiencias InformáticasFilteringLSQmemory disambiguationenergy-efficiencyOne of the main challenges of modern processor designs is the implementation of scalable and efficient mechanisms to detect memory access order violations as a result of out-of-order execution. Conventional structures performing this task are complex, inefficient and power-hungry. This fact has generated a large body of work on optimizing address-based memory disambiguation logic, namely the load-store queue. In this paper we review the most significant proposals in this research field, focusing on our own contributions.Facultad de Informática2008-10info:eu-repo/semantics/articleinfo:eu-repo/semantics/publishedVersionArticulohttp://purl.org/coar/resource_type/c_6501info:ar-repo/semantics/articuloapplication/pdf132-138http://sedici.unlp.edu.ar/handle/10915/9636enginfo:eu-repo/semantics/altIdentifier/url/http://journal.info.unlp.edu.ar/wp-content/uploads/JCST-Oct08-1.pdfinfo:eu-repo/semantics/altIdentifier/issn/1666-6038info:eu-repo/semantics/openAccesshttp://creativecommons.org/licenses/by-nc/3.0/Creative Commons Attribution-NonCommercial 3.0 Unported (CC BY-NC 3.0)reponame:SEDICI (UNLP)instname:Universidad Nacional de La Platainstacron:UNLP2025-09-29T10:50:44Zoai:sedici.unlp.edu.ar:10915/9636Institucionalhttp://sedici.unlp.edu.ar/Universidad públicaNo correspondehttp://sedici.unlp.edu.ar/oai/snrdalira@sedici.unlp.edu.arArgentinaNo correspondeNo correspondeNo correspondeopendoar:13292025-09-29 10:50:45.172SEDICI (UNLP) - Universidad Nacional de La Platafalse
dc.title.none.fl_str_mv Memory disambiguation hardware: a review
title Memory disambiguation hardware: a review
spellingShingle Memory disambiguation hardware: a review
Castro, Fernando
Ciencias Informáticas
Filtering
LSQ
memory disambiguation
energy-efficiency
title_short Memory disambiguation hardware: a review
title_full Memory disambiguation hardware: a review
title_fullStr Memory disambiguation hardware: a review
title_full_unstemmed Memory disambiguation hardware: a review
title_sort Memory disambiguation hardware: a review
dc.creator.none.fl_str_mv Castro, Fernando
Chaver, Daniel
Piñuel, Luis
Prieto, Manuel
Tirado Fernández, Francisco
author Castro, Fernando
author_facet Castro, Fernando
Chaver, Daniel
Piñuel, Luis
Prieto, Manuel
Tirado Fernández, Francisco
author_role author
author2 Chaver, Daniel
Piñuel, Luis
Prieto, Manuel
Tirado Fernández, Francisco
author2_role author
author
author
author
dc.subject.none.fl_str_mv Ciencias Informáticas
Filtering
LSQ
memory disambiguation
energy-efficiency
topic Ciencias Informáticas
Filtering
LSQ
memory disambiguation
energy-efficiency
dc.description.none.fl_txt_mv One of the main challenges of modern processor designs is the implementation of scalable and efficient mechanisms to detect memory access order violations as a result of out-of-order execution. Conventional structures performing this task are complex, inefficient and power-hungry. This fact has generated a large body of work on optimizing address-based memory disambiguation logic, namely the load-store queue. In this paper we review the most significant proposals in this research field, focusing on our own contributions.
Facultad de Informática
description One of the main challenges of modern processor designs is the implementation of scalable and efficient mechanisms to detect memory access order violations as a result of out-of-order execution. Conventional structures performing this task are complex, inefficient and power-hungry. This fact has generated a large body of work on optimizing address-based memory disambiguation logic, namely the load-store queue. In this paper we review the most significant proposals in this research field, focusing on our own contributions.
publishDate 2008
dc.date.none.fl_str_mv 2008-10
dc.type.none.fl_str_mv info:eu-repo/semantics/article
info:eu-repo/semantics/publishedVersion
Articulo
http://purl.org/coar/resource_type/c_6501
info:ar-repo/semantics/articulo
format article
status_str publishedVersion
dc.identifier.none.fl_str_mv http://sedici.unlp.edu.ar/handle/10915/9636
url http://sedici.unlp.edu.ar/handle/10915/9636
dc.language.none.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv info:eu-repo/semantics/altIdentifier/url/http://journal.info.unlp.edu.ar/wp-content/uploads/JCST-Oct08-1.pdf
info:eu-repo/semantics/altIdentifier/issn/1666-6038
dc.rights.none.fl_str_mv info:eu-repo/semantics/openAccess
http://creativecommons.org/licenses/by-nc/3.0/
Creative Commons Attribution-NonCommercial 3.0 Unported (CC BY-NC 3.0)
eu_rights_str_mv openAccess
rights_invalid_str_mv http://creativecommons.org/licenses/by-nc/3.0/
Creative Commons Attribution-NonCommercial 3.0 Unported (CC BY-NC 3.0)
dc.format.none.fl_str_mv application/pdf
132-138
dc.source.none.fl_str_mv reponame:SEDICI (UNLP)
instname:Universidad Nacional de La Plata
instacron:UNLP
reponame_str SEDICI (UNLP)
collection SEDICI (UNLP)
instname_str Universidad Nacional de La Plata
instacron_str UNLP
institution UNLP
repository.name.fl_str_mv SEDICI (UNLP) - Universidad Nacional de La Plata
repository.mail.fl_str_mv alira@sedici.unlp.edu.ar
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score 13.069144

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