Metrics for fast, low-cost adders in FPGA
- Autores
- Simonelli, Daniel Horacio; Vázquez, Martín Osvaldo
- Año de publicación
- 2003
- Idioma
- inglés
- Tipo de recurso
- documento de conferencia
- Estado
- versión publicada
- Descripción
- In this paper several adder design techniques that probed to be very effective in full-custom integrated circuit design are presented as well as the conclusions regarding its implementation on FPGA. Particularly, in this work, Xilinx XC4000E family is selected as target technology and results achieved without using dedicated carry logic present in these devices are evaluated. This paper aims to substantiate the fact that these techniques indeed reduce delay time in other technologies than full custom design and from these results decide if it is worth trying implementations using XC4000E dedicated carry logic.
Eje: Arquitectura, Redes y Sistemas Operativos (ARSO)
Red de Universidades con Carreras en Informática (RedUNCI) - Materia
-
Ciencias Informáticas
sistema operativo
Metrics for Fast
Metrics
Architectures
Low-Cost Adders
FPGA - Nivel de accesibilidad
- acceso abierto
- Condiciones de uso
- http://creativecommons.org/licenses/by-nc-sa/2.5/ar/
- Repositorio
.jpg)
- Institución
- Universidad Nacional de La Plata
- OAI Identificador
- oai:sedici.unlp.edu.ar:10915/22643
Ver los metadatos del registro completo
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Metrics for fast, low-cost adders in FPGASimonelli, Daniel HoracioVázquez, Martín OsvaldoCiencias Informáticassistema operativoMetrics for FastMetricsArchitecturesLow-Cost AddersFPGAIn this paper several adder design techniques that probed to be very effective in full-custom integrated circuit design are presented as well as the conclusions regarding its implementation on FPGA. Particularly, in this work, Xilinx XC4000E family is selected as target technology and results achieved without using dedicated carry logic present in these devices are evaluated. This paper aims to substantiate the fact that these techniques indeed reduce delay time in other technologies than full custom design and from these results decide if it is worth trying implementations using XC4000E dedicated carry logic.Eje: Arquitectura, Redes y Sistemas Operativos (ARSO)Red de Universidades con Carreras en Informática (RedUNCI)2003-10info:eu-repo/semantics/conferenceObjectinfo:eu-repo/semantics/publishedVersionObjeto de conferenciahttp://purl.org/coar/resource_type/c_5794info:ar-repo/semantics/documentoDeConferenciaapplication/pdf1384-1392http://sedici.unlp.edu.ar/handle/10915/22643enginfo:eu-repo/semantics/openAccesshttp://creativecommons.org/licenses/by-nc-sa/2.5/ar/Creative Commons Attribution-NonCommercial-ShareAlike 2.5 Argentina (CC BY-NC-SA 2.5)reponame:SEDICI (UNLP)instname:Universidad Nacional de La Platainstacron:UNLP2025-09-29T10:55:07Zoai:sedici.unlp.edu.ar:10915/22643Institucionalhttp://sedici.unlp.edu.ar/Universidad públicaNo correspondehttp://sedici.unlp.edu.ar/oai/snrdalira@sedici.unlp.edu.arArgentinaNo correspondeNo correspondeNo correspondeopendoar:13292025-09-29 10:55:08.094SEDICI (UNLP) - Universidad Nacional de La Platafalse |
| dc.title.none.fl_str_mv |
Metrics for fast, low-cost adders in FPGA |
| title |
Metrics for fast, low-cost adders in FPGA |
| spellingShingle |
Metrics for fast, low-cost adders in FPGA Simonelli, Daniel Horacio Ciencias Informáticas sistema operativo Metrics for Fast Metrics Architectures Low-Cost Adders FPGA |
| title_short |
Metrics for fast, low-cost adders in FPGA |
| title_full |
Metrics for fast, low-cost adders in FPGA |
| title_fullStr |
Metrics for fast, low-cost adders in FPGA |
| title_full_unstemmed |
Metrics for fast, low-cost adders in FPGA |
| title_sort |
Metrics for fast, low-cost adders in FPGA |
| dc.creator.none.fl_str_mv |
Simonelli, Daniel Horacio Vázquez, Martín Osvaldo |
| author |
Simonelli, Daniel Horacio |
| author_facet |
Simonelli, Daniel Horacio Vázquez, Martín Osvaldo |
| author_role |
author |
| author2 |
Vázquez, Martín Osvaldo |
| author2_role |
author |
| dc.subject.none.fl_str_mv |
Ciencias Informáticas sistema operativo Metrics for Fast Metrics Architectures Low-Cost Adders FPGA |
| topic |
Ciencias Informáticas sistema operativo Metrics for Fast Metrics Architectures Low-Cost Adders FPGA |
| dc.description.none.fl_txt_mv |
In this paper several adder design techniques that probed to be very effective in full-custom integrated circuit design are presented as well as the conclusions regarding its implementation on FPGA. Particularly, in this work, Xilinx XC4000E family is selected as target technology and results achieved without using dedicated carry logic present in these devices are evaluated. This paper aims to substantiate the fact that these techniques indeed reduce delay time in other technologies than full custom design and from these results decide if it is worth trying implementations using XC4000E dedicated carry logic. Eje: Arquitectura, Redes y Sistemas Operativos (ARSO) Red de Universidades con Carreras en Informática (RedUNCI) |
| description |
In this paper several adder design techniques that probed to be very effective in full-custom integrated circuit design are presented as well as the conclusions regarding its implementation on FPGA. Particularly, in this work, Xilinx XC4000E family is selected as target technology and results achieved without using dedicated carry logic present in these devices are evaluated. This paper aims to substantiate the fact that these techniques indeed reduce delay time in other technologies than full custom design and from these results decide if it is worth trying implementations using XC4000E dedicated carry logic. |
| publishDate |
2003 |
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2003-10 |
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eng |
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eng |
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