Metrics for FIR Filters based on distributed arithmetic in FPGA
- Autores
- Vázquez, Martín Osvaldo; Simonelli, Daniel Horacio; Acosta, Nelson
- Año de publicación
- 2004
- Idioma
- inglés
- Tipo de recurso
- documento de conferencia
- Estado
- versión publicada
- Descripción
- In this paper, metrics regarding different architectures for distributed arithmetic based FIR filters in FPGA are presented. Main filter parameters are described as well as diverse design techniques applied: pipelining, bit-serial, digit-serial y bit-parallel. Each filter description was written in VHDL at RTL level. For achieving this goal no relative location (rloc) technique was used what redounds on more generic and expensive designs than those available through Core Generator tool. Implementation has been carried out over FPGAs belonging to Xilinx Virtex II family.
Eje: IV - Workshop de procesamiento distribuido y paralelo
Red de Universidades con Carreras en Informática (RedUNCI) - Materia
-
Ciencias Informáticas
Parallel processing
Distributed
Metrics
distributed arithmetic
FPGA
FIR - Nivel de accesibilidad
- acceso abierto
- Condiciones de uso
- http://creativecommons.org/licenses/by-nc-sa/2.5/ar/
- Repositorio
- Institución
- Universidad Nacional de La Plata
- OAI Identificador
- oai:sedici.unlp.edu.ar:10915/22495
Ver los metadatos del registro completo
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Metrics for FIR Filters based on distributed arithmetic in FPGAVázquez, Martín OsvaldoSimonelli, Daniel HoracioAcosta, NelsonCiencias InformáticasParallel processingDistributedMetricsdistributed arithmeticFPGAFIRIn this paper, metrics regarding different architectures for distributed arithmetic based FIR filters in FPGA are presented. Main filter parameters are described as well as diverse design techniques applied: pipelining, bit-serial, digit-serial y bit-parallel. Each filter description was written in VHDL at RTL level. For achieving this goal no relative location (rloc) technique was used what redounds on more generic and expensive designs than those available through Core Generator tool. Implementation has been carried out over FPGAs belonging to Xilinx Virtex II family.Eje: IV - Workshop de procesamiento distribuido y paraleloRed de Universidades con Carreras en Informática (RedUNCI)2004info:eu-repo/semantics/conferenceObjectinfo:eu-repo/semantics/publishedVersionObjeto de conferenciahttp://purl.org/coar/resource_type/c_5794info:ar-repo/semantics/documentoDeConferenciaapplication/pdfhttp://sedici.unlp.edu.ar/handle/10915/22495enginfo:eu-repo/semantics/openAccesshttp://creativecommons.org/licenses/by-nc-sa/2.5/ar/Creative Commons Attribution-NonCommercial-ShareAlike 2.5 Argentina (CC BY-NC-SA 2.5)reponame:SEDICI (UNLP)instname:Universidad Nacional de La Platainstacron:UNLP2025-09-03T10:27:53Zoai:sedici.unlp.edu.ar:10915/22495Institucionalhttp://sedici.unlp.edu.ar/Universidad públicaNo correspondehttp://sedici.unlp.edu.ar/oai/snrdalira@sedici.unlp.edu.arArgentinaNo correspondeNo correspondeNo correspondeopendoar:13292025-09-03 10:27:53.705SEDICI (UNLP) - Universidad Nacional de La Platafalse |
dc.title.none.fl_str_mv |
Metrics for FIR Filters based on distributed arithmetic in FPGA |
title |
Metrics for FIR Filters based on distributed arithmetic in FPGA |
spellingShingle |
Metrics for FIR Filters based on distributed arithmetic in FPGA Vázquez, Martín Osvaldo Ciencias Informáticas Parallel processing Distributed Metrics distributed arithmetic FPGA FIR |
title_short |
Metrics for FIR Filters based on distributed arithmetic in FPGA |
title_full |
Metrics for FIR Filters based on distributed arithmetic in FPGA |
title_fullStr |
Metrics for FIR Filters based on distributed arithmetic in FPGA |
title_full_unstemmed |
Metrics for FIR Filters based on distributed arithmetic in FPGA |
title_sort |
Metrics for FIR Filters based on distributed arithmetic in FPGA |
dc.creator.none.fl_str_mv |
Vázquez, Martín Osvaldo Simonelli, Daniel Horacio Acosta, Nelson |
author |
Vázquez, Martín Osvaldo |
author_facet |
Vázquez, Martín Osvaldo Simonelli, Daniel Horacio Acosta, Nelson |
author_role |
author |
author2 |
Simonelli, Daniel Horacio Acosta, Nelson |
author2_role |
author author |
dc.subject.none.fl_str_mv |
Ciencias Informáticas Parallel processing Distributed Metrics distributed arithmetic FPGA FIR |
topic |
Ciencias Informáticas Parallel processing Distributed Metrics distributed arithmetic FPGA FIR |
dc.description.none.fl_txt_mv |
In this paper, metrics regarding different architectures for distributed arithmetic based FIR filters in FPGA are presented. Main filter parameters are described as well as diverse design techniques applied: pipelining, bit-serial, digit-serial y bit-parallel. Each filter description was written in VHDL at RTL level. For achieving this goal no relative location (rloc) technique was used what redounds on more generic and expensive designs than those available through Core Generator tool. Implementation has been carried out over FPGAs belonging to Xilinx Virtex II family. Eje: IV - Workshop de procesamiento distribuido y paralelo Red de Universidades con Carreras en Informática (RedUNCI) |
description |
In this paper, metrics regarding different architectures for distributed arithmetic based FIR filters in FPGA are presented. Main filter parameters are described as well as diverse design techniques applied: pipelining, bit-serial, digit-serial y bit-parallel. Each filter description was written in VHDL at RTL level. For achieving this goal no relative location (rloc) technique was used what redounds on more generic and expensive designs than those available through Core Generator tool. Implementation has been carried out over FPGAs belonging to Xilinx Virtex II family. |
publishDate |
2004 |
dc.date.none.fl_str_mv |
2004 |
dc.type.none.fl_str_mv |
info:eu-repo/semantics/conferenceObject info:eu-repo/semantics/publishedVersion Objeto de conferencia http://purl.org/coar/resource_type/c_5794 info:ar-repo/semantics/documentoDeConferencia |
format |
conferenceObject |
status_str |
publishedVersion |
dc.identifier.none.fl_str_mv |
http://sedici.unlp.edu.ar/handle/10915/22495 |
url |
http://sedici.unlp.edu.ar/handle/10915/22495 |
dc.language.none.fl_str_mv |
eng |
language |
eng |
dc.rights.none.fl_str_mv |
info:eu-repo/semantics/openAccess http://creativecommons.org/licenses/by-nc-sa/2.5/ar/ Creative Commons Attribution-NonCommercial-ShareAlike 2.5 Argentina (CC BY-NC-SA 2.5) |
eu_rights_str_mv |
openAccess |
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http://creativecommons.org/licenses/by-nc-sa/2.5/ar/ Creative Commons Attribution-NonCommercial-ShareAlike 2.5 Argentina (CC BY-NC-SA 2.5) |
dc.format.none.fl_str_mv |
application/pdf |
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SEDICI (UNLP) - Universidad Nacional de La Plata |
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score |
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