Intelligent systems engineering with reconfigurable computing

Autores
Skliarova, Iouliia
Año de publicación
2006
Idioma
inglés
Tipo de recurso
documento de conferencia
Estado
versión publicada
Descripción
Intelligent computing systems comprising microprocessor cores, memory and reconfigurable user-programmable logic represent a promising technology which is well-suited for applications such as digital signal and image processing, cryptography and encryption, etc. These applications employ frequently recursive algorithms which are particularly appropriate when the underlying problem is defined in recursive terms and it is difficult to reformulate it as an iterative procedure. It is known, however, that hardware description languages (such as VHDL) as well as system-level specification languages (such as Handel-C) that are usually employed for specifying the required functionality of reconfigurable systems do not provide a direct support for recursion. In this paper a method allowing recursive algorithms to be easily described in Handel-C and implemented in an FPGA (field-programmable gate array) is proposed. The recursive search algorithm for the knapsack problem is considered as an example
Applications in Artificial Intelligence - Knowledge Engineering
Red de Universidades con Carreras en Informática (RedUNCI)
Materia
Ciencias Informáticas
Intelligent computing systems (ICS)
FPGA (field-programmable gate array)
algorithm mapping
Nivel de accesibilidad
acceso abierto
Condiciones de uso
http://creativecommons.org/licenses/by-nc-sa/2.5/ar/
Repositorio
SEDICI (UNLP)
Institución
Universidad Nacional de La Plata
OAI Identificador
oai:sedici.unlp.edu.ar:10915/24204

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spelling Intelligent systems engineering with reconfigurable computingSkliarova, IouliiaCiencias InformáticasIntelligent computing systems (ICS)FPGA (field-programmable gate array)algorithm mappingIntelligent computing systems comprising microprocessor cores, memory and reconfigurable user-programmable logic represent a promising technology which is well-suited for applications such as digital signal and image processing, cryptography and encryption, etc. These applications employ frequently recursive algorithms which are particularly appropriate when the underlying problem is defined in recursive terms and it is difficult to reformulate it as an iterative procedure. It is known, however, that hardware description languages (such as VHDL) as well as system-level specification languages (such as Handel-C) that are usually employed for specifying the required functionality of reconfigurable systems do not provide a direct support for recursion. In this paper a method allowing recursive algorithms to be easily described in Handel-C and implemented in an FPGA (field-programmable gate array) is proposed. The recursive search algorithm for the knapsack problem is considered as an exampleApplications in Artificial Intelligence - Knowledge EngineeringRed de Universidades con Carreras en Informática (RedUNCI)2006-08info:eu-repo/semantics/conferenceObjectinfo:eu-repo/semantics/publishedVersionObjeto de conferenciahttp://purl.org/coar/resource_type/c_5794info:ar-repo/semantics/documentoDeConferenciaapplication/pdfhttp://sedici.unlp.edu.ar/handle/10915/24204enginfo:eu-repo/semantics/altIdentifier/isbn/0-387-34655-4info:eu-repo/semantics/openAccesshttp://creativecommons.org/licenses/by-nc-sa/2.5/ar/Creative Commons Attribution-NonCommercial-ShareAlike 2.5 Argentina (CC BY-NC-SA 2.5)reponame:SEDICI (UNLP)instname:Universidad Nacional de La Platainstacron:UNLP2025-10-22T16:37:18Zoai:sedici.unlp.edu.ar:10915/24204Institucionalhttp://sedici.unlp.edu.ar/Universidad públicaNo correspondehttp://sedici.unlp.edu.ar/oai/snrdalira@sedici.unlp.edu.arArgentinaNo correspondeNo correspondeNo correspondeopendoar:13292025-10-22 16:37:18.894SEDICI (UNLP) - Universidad Nacional de La Platafalse
dc.title.none.fl_str_mv Intelligent systems engineering with reconfigurable computing
title Intelligent systems engineering with reconfigurable computing
spellingShingle Intelligent systems engineering with reconfigurable computing
Skliarova, Iouliia
Ciencias Informáticas
Intelligent computing systems (ICS)
FPGA (field-programmable gate array)
algorithm mapping
title_short Intelligent systems engineering with reconfigurable computing
title_full Intelligent systems engineering with reconfigurable computing
title_fullStr Intelligent systems engineering with reconfigurable computing
title_full_unstemmed Intelligent systems engineering with reconfigurable computing
title_sort Intelligent systems engineering with reconfigurable computing
dc.creator.none.fl_str_mv Skliarova, Iouliia
author Skliarova, Iouliia
author_facet Skliarova, Iouliia
author_role author
dc.subject.none.fl_str_mv Ciencias Informáticas
Intelligent computing systems (ICS)
FPGA (field-programmable gate array)
algorithm mapping
topic Ciencias Informáticas
Intelligent computing systems (ICS)
FPGA (field-programmable gate array)
algorithm mapping
dc.description.none.fl_txt_mv Intelligent computing systems comprising microprocessor cores, memory and reconfigurable user-programmable logic represent a promising technology which is well-suited for applications such as digital signal and image processing, cryptography and encryption, etc. These applications employ frequently recursive algorithms which are particularly appropriate when the underlying problem is defined in recursive terms and it is difficult to reformulate it as an iterative procedure. It is known, however, that hardware description languages (such as VHDL) as well as system-level specification languages (such as Handel-C) that are usually employed for specifying the required functionality of reconfigurable systems do not provide a direct support for recursion. In this paper a method allowing recursive algorithms to be easily described in Handel-C and implemented in an FPGA (field-programmable gate array) is proposed. The recursive search algorithm for the knapsack problem is considered as an example
Applications in Artificial Intelligence - Knowledge Engineering
Red de Universidades con Carreras en Informática (RedUNCI)
description Intelligent computing systems comprising microprocessor cores, memory and reconfigurable user-programmable logic represent a promising technology which is well-suited for applications such as digital signal and image processing, cryptography and encryption, etc. These applications employ frequently recursive algorithms which are particularly appropriate when the underlying problem is defined in recursive terms and it is difficult to reformulate it as an iterative procedure. It is known, however, that hardware description languages (such as VHDL) as well as system-level specification languages (such as Handel-C) that are usually employed for specifying the required functionality of reconfigurable systems do not provide a direct support for recursion. In this paper a method allowing recursive algorithms to be easily described in Handel-C and implemented in an FPGA (field-programmable gate array) is proposed. The recursive search algorithm for the knapsack problem is considered as an example
publishDate 2006
dc.date.none.fl_str_mv 2006-08
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info:eu-repo/semantics/publishedVersion
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http://purl.org/coar/resource_type/c_5794
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dc.language.none.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv info:eu-repo/semantics/altIdentifier/isbn/0-387-34655-4
dc.rights.none.fl_str_mv info:eu-repo/semantics/openAccess
http://creativecommons.org/licenses/by-nc-sa/2.5/ar/
Creative Commons Attribution-NonCommercial-ShareAlike 2.5 Argentina (CC BY-NC-SA 2.5)
eu_rights_str_mv openAccess
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Creative Commons Attribution-NonCommercial-ShareAlike 2.5 Argentina (CC BY-NC-SA 2.5)
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