Multilevel Current-Source Inverter With FPGA Control

Autores
Aguirre, Miguel Pablo; Calvino, Laura; Valla, Maria Ines
Año de publicación
2013
Idioma
inglés
Tipo de recurso
artículo
Estado
versión publicada
Descripción
In this paper, a multilevel current-source inverter (MCSI) topology is analyzed. The issue of constructing a novel modular single-rating inductor MCSI is explored, taking advantage of the features of field-programmable gate arrays (FPGA) for control and gate signal generation. The proposed topology is built with identical modules where all inductors carry the same amount of current, simplifying the construction and operation of industrial applications with higher efficiency. A new state-machine approach, which is easy to implement in an FPGA, and a proper implementation of the phase-shifted carrier sinusoidal pulse width modulation (PSC-SPWM) allow both current balance in all modules and effective switching-frequency minimization. The performance of the MSCI proposed is simulated with Matlab and is verified by constructing a prototype.
Fil: Aguirre, Miguel Pablo. Instituto Tecnológico de Buenos Aires; Argentina
Fil: Calvino, Laura. Instituto Tecnológico de Buenos Aires; Argentina
Fil: Valla, Maria Ines. Consejo Nacional de Investigaciones Científicas y Técnicas. Centro Científico Tecnológico Conicet - La Plata; Argentina. Universidad Nacional de La Plata. Facultad de Ingeniería; Argentina
Materia
Field-Programmable Gate Array (Fpga)
Multilevel Current-Source Inverter (Mcsi)
Phase-Shifted Carrier Spwm (Psc-Spwm)
Nivel de accesibilidad
acceso abierto
Condiciones de uso
https://creativecommons.org/licenses/by-nc-sa/2.5/ar/
Repositorio
CONICET Digital (CONICET)
Institución
Consejo Nacional de Investigaciones Científicas y Técnicas
OAI Identificador
oai:ri.conicet.gov.ar:11336/76757
Acceder
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oai_identifier_str oai:ri.conicet.gov.ar:11336/76757
network_acronym_str CONICETDig
repository_id_str 3498
network_name_str CONICET Digital (CONICET)
spelling Multilevel Current-Source Inverter With FPGA ControlAguirre, Miguel PabloCalvino, LauraValla, Maria InesField-Programmable Gate Array (Fpga)Multilevel Current-Source Inverter (Mcsi)Phase-Shifted Carrier Spwm (Psc-Spwm)https://purl.org/becyt/ford/2.2https://purl.org/becyt/ford/2In this paper, a multilevel current-source inverter (MCSI) topology is analyzed. The issue of constructing a novel modular single-rating inductor MCSI is explored, taking advantage of the features of field-programmable gate arrays (FPGA) for control and gate signal generation. The proposed topology is built with identical modules where all inductors carry the same amount of current, simplifying the construction and operation of industrial applications with higher efficiency. A new state-machine approach, which is easy to implement in an FPGA, and a proper implementation of the phase-shifted carrier sinusoidal pulse width modulation (PSC-SPWM) allow both current balance in all modules and effective switching-frequency minimization. The performance of the MSCI proposed is simulated with Matlab and is verified by constructing a prototype.Fil: Aguirre, Miguel Pablo. Instituto Tecnológico de Buenos Aires; ArgentinaFil: Calvino, Laura. Instituto Tecnológico de Buenos Aires; ArgentinaFil: Valla, Maria Ines. Consejo Nacional de Investigaciones Científicas y Técnicas. Centro Científico Tecnológico Conicet - La Plata; Argentina. Universidad Nacional de La Plata. Facultad de Ingeniería; ArgentinaInstitute of Electrical and Electronics Engineers2013-01info:eu-repo/semantics/articleinfo:eu-repo/semantics/publishedVersionhttp://purl.org/coar/resource_type/c_6501info:ar-repo/semantics/articuloapplication/pdfapplication/pdfapplication/pdfhttp://hdl.handle.net/11336/76757Aguirre, Miguel Pablo; Calvino, Laura; Valla, Maria Ines; Multilevel Current-Source Inverter With FPGA Control; Institute of Electrical and Electronics Engineers; Ieee Transactions On Industrial Electronics; 60; 1; 1-2013; 3-100278-00461557-9948CONICET DigitalCONICETenginfo:eu-repo/semantics/altIdentifier/url/http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6138305info:eu-repo/semantics/altIdentifier/doi/10.1109/TIE.2012.2185014info:eu-repo/semantics/openAccesshttps://creativecommons.org/licenses/by-nc-sa/2.5/ar/reponame:CONICET Digital (CONICET)instname:Consejo Nacional de Investigaciones Científicas y Técnicas2025-09-29T10:33:47Zoai:ri.conicet.gov.ar:11336/76757instacron:CONICETInstitucionalhttp://ri.conicet.gov.ar/Organismo científico-tecnológicoNo correspondehttp://ri.conicet.gov.ar/oai/requestdasensio@conicet.gov.ar; lcarlino@conicet.gov.arArgentinaNo correspondeNo correspondeNo correspondeopendoar:34982025-09-29 10:33:47.532CONICET Digital (CONICET) - Consejo Nacional de Investigaciones Científicas y Técnicasfalse
dc.title.none.fl_str_mv Multilevel Current-Source Inverter With FPGA Control
title Multilevel Current-Source Inverter With FPGA Control
spellingShingle Multilevel Current-Source Inverter With FPGA Control
Aguirre, Miguel Pablo
Field-Programmable Gate Array (Fpga)
Multilevel Current-Source Inverter (Mcsi)
Phase-Shifted Carrier Spwm (Psc-Spwm)
title_short Multilevel Current-Source Inverter With FPGA Control
title_full Multilevel Current-Source Inverter With FPGA Control
title_fullStr Multilevel Current-Source Inverter With FPGA Control
title_full_unstemmed Multilevel Current-Source Inverter With FPGA Control
title_sort Multilevel Current-Source Inverter With FPGA Control
dc.creator.none.fl_str_mv Aguirre, Miguel Pablo
Calvino, Laura
Valla, Maria Ines
author Aguirre, Miguel Pablo
author_facet Aguirre, Miguel Pablo
Calvino, Laura
Valla, Maria Ines
author_role author
author2 Calvino, Laura
Valla, Maria Ines
author2_role author
author
dc.subject.none.fl_str_mv Field-Programmable Gate Array (Fpga)
Multilevel Current-Source Inverter (Mcsi)
Phase-Shifted Carrier Spwm (Psc-Spwm)
topic Field-Programmable Gate Array (Fpga)
Multilevel Current-Source Inverter (Mcsi)
Phase-Shifted Carrier Spwm (Psc-Spwm)
purl_subject.fl_str_mv https://purl.org/becyt/ford/2.2
https://purl.org/becyt/ford/2
dc.description.none.fl_txt_mv In this paper, a multilevel current-source inverter (MCSI) topology is analyzed. The issue of constructing a novel modular single-rating inductor MCSI is explored, taking advantage of the features of field-programmable gate arrays (FPGA) for control and gate signal generation. The proposed topology is built with identical modules where all inductors carry the same amount of current, simplifying the construction and operation of industrial applications with higher efficiency. A new state-machine approach, which is easy to implement in an FPGA, and a proper implementation of the phase-shifted carrier sinusoidal pulse width modulation (PSC-SPWM) allow both current balance in all modules and effective switching-frequency minimization. The performance of the MSCI proposed is simulated with Matlab and is verified by constructing a prototype.
Fil: Aguirre, Miguel Pablo. Instituto Tecnológico de Buenos Aires; Argentina
Fil: Calvino, Laura. Instituto Tecnológico de Buenos Aires; Argentina
Fil: Valla, Maria Ines. Consejo Nacional de Investigaciones Científicas y Técnicas. Centro Científico Tecnológico Conicet - La Plata; Argentina. Universidad Nacional de La Plata. Facultad de Ingeniería; Argentina
description In this paper, a multilevel current-source inverter (MCSI) topology is analyzed. The issue of constructing a novel modular single-rating inductor MCSI is explored, taking advantage of the features of field-programmable gate arrays (FPGA) for control and gate signal generation. The proposed topology is built with identical modules where all inductors carry the same amount of current, simplifying the construction and operation of industrial applications with higher efficiency. A new state-machine approach, which is easy to implement in an FPGA, and a proper implementation of the phase-shifted carrier sinusoidal pulse width modulation (PSC-SPWM) allow both current balance in all modules and effective switching-frequency minimization. The performance of the MSCI proposed is simulated with Matlab and is verified by constructing a prototype.
publishDate 2013
dc.date.none.fl_str_mv 2013-01
dc.type.none.fl_str_mv info:eu-repo/semantics/article
info:eu-repo/semantics/publishedVersion
http://purl.org/coar/resource_type/c_6501
info:ar-repo/semantics/articulo
format article
status_str publishedVersion
dc.identifier.none.fl_str_mv http://hdl.handle.net/11336/76757
Aguirre, Miguel Pablo; Calvino, Laura; Valla, Maria Ines; Multilevel Current-Source Inverter With FPGA Control; Institute of Electrical and Electronics Engineers; Ieee Transactions On Industrial Electronics; 60; 1; 1-2013; 3-10
0278-0046
1557-9948
CONICET Digital
CONICET
url http://hdl.handle.net/11336/76757
identifier_str_mv Aguirre, Miguel Pablo; Calvino, Laura; Valla, Maria Ines; Multilevel Current-Source Inverter With FPGA Control; Institute of Electrical and Electronics Engineers; Ieee Transactions On Industrial Electronics; 60; 1; 1-2013; 3-10
0278-0046
1557-9948
CONICET Digital
CONICET
dc.language.none.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv info:eu-repo/semantics/altIdentifier/url/http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6138305
info:eu-repo/semantics/altIdentifier/doi/10.1109/TIE.2012.2185014
dc.rights.none.fl_str_mv info:eu-repo/semantics/openAccess
https://creativecommons.org/licenses/by-nc-sa/2.5/ar/
eu_rights_str_mv openAccess
rights_invalid_str_mv https://creativecommons.org/licenses/by-nc-sa/2.5/ar/
dc.format.none.fl_str_mv application/pdf
application/pdf
application/pdf
dc.publisher.none.fl_str_mv Institute of Electrical and Electronics Engineers
publisher.none.fl_str_mv Institute of Electrical and Electronics Engineers
dc.source.none.fl_str_mv reponame:CONICET Digital (CONICET)
instname:Consejo Nacional de Investigaciones Científicas y Técnicas
reponame_str CONICET Digital (CONICET)
collection CONICET Digital (CONICET)
instname_str Consejo Nacional de Investigaciones Científicas y Técnicas
repository.name.fl_str_mv CONICET Digital (CONICET) - Consejo Nacional de Investigaciones Científicas y Técnicas
repository.mail.fl_str_mv dasensio@conicet.gov.ar; lcarlino@conicet.gov.ar
_version_ 1844614353830019072
score 13.070432

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