System on Chip based Brain-Computer Interface

• Autores: García, Pablo Andrés; Oliva, Matías Javier; Spinelli, Enrique Mario
• Año de publicación: 2020
• Idioma: inglés
• Tipo de recurso: documento de conferencia
• Materia: Ingeniería Electrónica; Embedded system; System on chip; Assistive Device; Bran-computer Interface; Steady-State Visual Evoked Potential; Speller
• Institución: Universidad Nacional de La Plata

This work presents an autonomous embedded system based on a system on chip that implements a braincomputer interface. The brain-computer interface is based on steady-state visual evoked biopotential and the embedded system on a system on chip which combines a dual-core Cortex-A9 embedded processor with programmable logic for design flexibility. The programmable logic side provides a solution for parallel tasks with strict real-time constraints, and the processor includes capabilities to port an operating system with a graphical user interface, network support, and file system, among others. Initially, a verification of the operative system running on the embedded processor sharing data with the logic side is presented, to find out its real-time capability as a set. Finally, a brain-computer interface based on visual evoked potentials is implemented. Results of this application recovering visual evoked potential on the embedded system, are also presented.
Instituto de Investigaciones en Electrónica, Control y Procesamiento de Señales