Adapting an IP MC6805 core for multiprocessing and multitasking
- Autores
- Jaquenod, Guillermo A.; Villagarcía Wanza, Horacio Alfredo; Bria, Oscar N.; De Giusti, Marisa Raquel
- Año de publicación
- 2003
- Idioma
- inglés
- Tipo de recurso
- documento de conferencia
- Estado
- versión publicada
- Descripción
- The availability of high-density field configurable devices provides the opportunity for designing highly integrated solutions (SOPC: System On a Programmable Chip).\nAmong the SOPC solutions, a case is the integration of an embedded single processor equipped with a multitasking operating system. As an alternative to a single processor the embedding of various processors on a chip, even heterogeneous and with multitasking capacity, may be considered.\nA distinctive characteristic of a SOPC device is that the tasks to be performed are well known before the design starts. That feature is opposed to the traditional multiprocessing and multitasking systems in which general purpose applications are adopted during design. The benefit of this knowledge is that hardware as well as software can be adapted to fit the application’s requirements.\nThis paper presents the hardware modifications performed on an microcontroller embedded core, to allow its inclusion as a multitasking device in a “multiprocessor on a chip”, through the addition of a hardware task manager (scheduler) and communication channels among processors.
La disponibilidad de dispositivos de Lógica Programable de alta densidad de integración permite buscar soluciones integradas en un dispositivo SOPC (System On a Programmable Chip).\nUn tema de creciente interés son los procesadores empotrados, siendo usual un único procesador y un sistema operativo con capacidad de multitarea.\nSin embargo, debe considerarse como alternativa insertar varios procesadores, no necesariamente idénticos, que pueden a su vez atender varias tareas. En un SOPC, como diferencia fundamental con los casos tradicionales de multiprocesamiento y multitarea, las tareas a realizar son conocidas antes de comenzar el diseño, por lo tanto hardware como software se pueden configurar a medida de la aplicación, combinando la velocidad propia del primero, con la versatilidad del segundo.\nEste artículo describe las modificaciones de hardware realizadas al núcleo IP (Intellectual Property) de un procesador, de modo de permitir la inclusión de un administrador de tareas por hardware y de canales de comunicación interprocesadores. - Materia
-
Ingeniería de Sistemas y Comunicaciones
multiprocesadores empotrados
lógica programable
System On a Programmable Chip - Nivel de accesibilidad
- acceso abierto
- Condiciones de uso
- http://creativecommons.org/licenses/by/4.0/
- Repositorio
- Institución
- Comisión de Investigaciones Científicas de la Provincia de Buenos Aires
- OAI Identificador
- oai:digital.cic.gba.gob.ar:11746/3558
Ver los metadatos del registro completo
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spelling |
Adapting an IP MC6805 core for multiprocessing and multitaskingJaquenod, Guillermo A.Villagarcía Wanza, Horacio AlfredoBria, Oscar N.De Giusti, Marisa RaquelIngeniería de Sistemas y Comunicacionesmultiprocesadores empotradoslógica programableSystem On a Programmable ChipThe availability of high-density field configurable devices provides the opportunity for designing highly integrated solutions (SOPC: System On a Programmable Chip).\nAmong the SOPC solutions, a case is the integration of an embedded single processor equipped with a multitasking operating system. As an alternative to a single processor the embedding of various processors on a chip, even heterogeneous and with multitasking capacity, may be considered.\nA distinctive characteristic of a SOPC device is that the tasks to be performed are well known before the design starts. That feature is opposed to the traditional multiprocessing and multitasking systems in which general purpose applications are adopted during design. The benefit of this knowledge is that hardware as well as software can be adapted to fit the application’s requirements.\nThis paper presents the hardware modifications performed on an microcontroller embedded core, to allow its inclusion as a multitasking device in a “multiprocessor on a chip”, through the addition of a hardware task manager (scheduler) and communication channels among processors.La disponibilidad de dispositivos de Lógica Programable de alta densidad de integración permite buscar soluciones integradas en un dispositivo SOPC (System On a Programmable Chip).\nUn tema de creciente interés son los procesadores empotrados, siendo usual un único procesador y un sistema operativo con capacidad de multitarea.\nSin embargo, debe considerarse como alternativa insertar varios procesadores, no necesariamente idénticos, que pueden a su vez atender varias tareas. En un SOPC, como diferencia fundamental con los casos tradicionales de multiprocesamiento y multitarea, las tareas a realizar son conocidas antes de comenzar el diseño, por lo tanto hardware como software se pueden configurar a medida de la aplicación, combinando la velocidad propia del primero, con la versatilidad del segundo.\nEste artículo describe las modificaciones de hardware realizadas al núcleo IP (Intellectual Property) de un procesador, de modo de permitir la inclusión de un administrador de tareas por hardware y de canales de comunicación interprocesadores.2003-03info:eu-repo/semantics/conferenceObjectinfo:eu-repo/semantics/publishedVersionhttp://purl.org/coar/resource_type/c_5794info:ar-repo/semantics/documentoDeConferenciaapplication/pdfhttps://digital.cic.gba.gob.ar/handle/11746/3558enginfo:eu-repo/semantics/openAccesshttp://creativecommons.org/licenses/by/4.0/reponame:CIC Digital (CICBA)instname:Comisión de Investigaciones Científicas de la Provincia de Buenos Airesinstacron:CICBA2025-09-29T13:40:15Zoai:digital.cic.gba.gob.ar:11746/3558Institucionalhttp://digital.cic.gba.gob.arOrganismo científico-tecnológicoNo correspondehttp://digital.cic.gba.gob.ar/oai/snrdmarisa.degiusti@sedici.unlp.edu.arArgentinaNo correspondeNo correspondeNo correspondeopendoar:94412025-09-29 13:40:15.249CIC Digital (CICBA) - Comisión de Investigaciones Científicas de la Provincia de Buenos Airesfalse |
dc.title.none.fl_str_mv |
Adapting an IP MC6805 core for multiprocessing and multitasking |
title |
Adapting an IP MC6805 core for multiprocessing and multitasking |
spellingShingle |
Adapting an IP MC6805 core for multiprocessing and multitasking Jaquenod, Guillermo A. Ingeniería de Sistemas y Comunicaciones multiprocesadores empotrados lógica programable System On a Programmable Chip |
title_short |
Adapting an IP MC6805 core for multiprocessing and multitasking |
title_full |
Adapting an IP MC6805 core for multiprocessing and multitasking |
title_fullStr |
Adapting an IP MC6805 core for multiprocessing and multitasking |
title_full_unstemmed |
Adapting an IP MC6805 core for multiprocessing and multitasking |
title_sort |
Adapting an IP MC6805 core for multiprocessing and multitasking |
dc.creator.none.fl_str_mv |
Jaquenod, Guillermo A. Villagarcía Wanza, Horacio Alfredo Bria, Oscar N. De Giusti, Marisa Raquel |
author |
Jaquenod, Guillermo A. |
author_facet |
Jaquenod, Guillermo A. Villagarcía Wanza, Horacio Alfredo Bria, Oscar N. De Giusti, Marisa Raquel |
author_role |
author |
author2 |
Villagarcía Wanza, Horacio Alfredo Bria, Oscar N. De Giusti, Marisa Raquel |
author2_role |
author author author |
dc.subject.none.fl_str_mv |
Ingeniería de Sistemas y Comunicaciones multiprocesadores empotrados lógica programable System On a Programmable Chip |
topic |
Ingeniería de Sistemas y Comunicaciones multiprocesadores empotrados lógica programable System On a Programmable Chip |
dc.description.none.fl_txt_mv |
The availability of high-density field configurable devices provides the opportunity for designing highly integrated solutions (SOPC: System On a Programmable Chip).\nAmong the SOPC solutions, a case is the integration of an embedded single processor equipped with a multitasking operating system. As an alternative to a single processor the embedding of various processors on a chip, even heterogeneous and with multitasking capacity, may be considered.\nA distinctive characteristic of a SOPC device is that the tasks to be performed are well known before the design starts. That feature is opposed to the traditional multiprocessing and multitasking systems in which general purpose applications are adopted during design. The benefit of this knowledge is that hardware as well as software can be adapted to fit the application’s requirements.\nThis paper presents the hardware modifications performed on an microcontroller embedded core, to allow its inclusion as a multitasking device in a “multiprocessor on a chip”, through the addition of a hardware task manager (scheduler) and communication channels among processors. La disponibilidad de dispositivos de Lógica Programable de alta densidad de integración permite buscar soluciones integradas en un dispositivo SOPC (System On a Programmable Chip).\nUn tema de creciente interés son los procesadores empotrados, siendo usual un único procesador y un sistema operativo con capacidad de multitarea.\nSin embargo, debe considerarse como alternativa insertar varios procesadores, no necesariamente idénticos, que pueden a su vez atender varias tareas. En un SOPC, como diferencia fundamental con los casos tradicionales de multiprocesamiento y multitarea, las tareas a realizar son conocidas antes de comenzar el diseño, por lo tanto hardware como software se pueden configurar a medida de la aplicación, combinando la velocidad propia del primero, con la versatilidad del segundo.\nEste artículo describe las modificaciones de hardware realizadas al núcleo IP (Intellectual Property) de un procesador, de modo de permitir la inclusión de un administrador de tareas por hardware y de canales de comunicación interprocesadores. |
description |
The availability of high-density field configurable devices provides the opportunity for designing highly integrated solutions (SOPC: System On a Programmable Chip).\nAmong the SOPC solutions, a case is the integration of an embedded single processor equipped with a multitasking operating system. As an alternative to a single processor the embedding of various processors on a chip, even heterogeneous and with multitasking capacity, may be considered.\nA distinctive characteristic of a SOPC device is that the tasks to be performed are well known before the design starts. That feature is opposed to the traditional multiprocessing and multitasking systems in which general purpose applications are adopted during design. The benefit of this knowledge is that hardware as well as software can be adapted to fit the application’s requirements.\nThis paper presents the hardware modifications performed on an microcontroller embedded core, to allow its inclusion as a multitasking device in a “multiprocessor on a chip”, through the addition of a hardware task manager (scheduler) and communication channels among processors. |
publishDate |
2003 |
dc.date.none.fl_str_mv |
2003-03 |
dc.type.none.fl_str_mv |
info:eu-repo/semantics/conferenceObject info:eu-repo/semantics/publishedVersion http://purl.org/coar/resource_type/c_5794 info:ar-repo/semantics/documentoDeConferencia |
format |
conferenceObject |
status_str |
publishedVersion |
dc.identifier.none.fl_str_mv |
https://digital.cic.gba.gob.ar/handle/11746/3558 |
url |
https://digital.cic.gba.gob.ar/handle/11746/3558 |
dc.language.none.fl_str_mv |
eng |
language |
eng |
dc.rights.none.fl_str_mv |
info:eu-repo/semantics/openAccess http://creativecommons.org/licenses/by/4.0/ |
eu_rights_str_mv |
openAccess |
rights_invalid_str_mv |
http://creativecommons.org/licenses/by/4.0/ |
dc.format.none.fl_str_mv |
application/pdf |
dc.source.none.fl_str_mv |
reponame:CIC Digital (CICBA) instname:Comisión de Investigaciones Científicas de la Provincia de Buenos Aires instacron:CICBA |
reponame_str |
CIC Digital (CICBA) |
collection |
CIC Digital (CICBA) |
instname_str |
Comisión de Investigaciones Científicas de la Provincia de Buenos Aires |
instacron_str |
CICBA |
institution |
CICBA |
repository.name.fl_str_mv |
CIC Digital (CICBA) - Comisión de Investigaciones Científicas de la Provincia de Buenos Aires |
repository.mail.fl_str_mv |
marisa.degiusti@sedici.unlp.edu.ar |
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1844618611750076416 |
score |
13.070432 |