NNGen: a powerful tool for the implementation of Artificial Neural Networks on a chip

Autores
Tosini, Marcelo Alejandro
Año de publicación
2003
Idioma
inglés
Tipo de recurso
documento de conferencia
Estado
versión publicada
Descripción
A design and development tool to achieve artificial neural networks (ANN) implemented in a Field Programmable Gate Array (FPGA), is presented in this article. Its main components and functionality are thoroughly described. This tool, called NNGen, allows constructing digital ANN, which are easily programmable selecting different parameters. The output of such programming task is directly VHDL code to be ported to, in principle, any chip of the mentioned kind. A case study of a multilayer perceptron applied to weather forecast that was fully designed with NNGen, is also analyzed to obtain some conclusions.
Sociedad Argentina de Informática e Investigación Operativa
Materia
Ciencias Informáticas
Artificial Neural Networks
FPGA
NNGen
Nivel de accesibilidad
acceso abierto
Condiciones de uso
http://creativecommons.org/licenses/by-nc-sa/4.0/
Repositorio
SEDICI (UNLP)
Institución
Universidad Nacional de La Plata
OAI Identificador
oai:sedici.unlp.edu.ar:10915/185211

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spelling NNGen: a powerful tool for the implementation of Artificial Neural Networks on a chipTosini, Marcelo AlejandroCiencias InformáticasArtificial Neural NetworksFPGANNGenA design and development tool to achieve artificial neural networks (ANN) implemented in a Field Programmable Gate Array (FPGA), is presented in this article. Its main components and functionality are thoroughly described. This tool, called NNGen, allows constructing digital ANN, which are easily programmable selecting different parameters. The output of such programming task is directly VHDL code to be ported to, in principle, any chip of the mentioned kind. A case study of a multilayer perceptron applied to weather forecast that was fully designed with NNGen, is also analyzed to obtain some conclusions.Sociedad Argentina de Informática e Investigación Operativa2003-09info:eu-repo/semantics/conferenceObjectinfo:eu-repo/semantics/publishedVersionObjeto de conferenciahttp://purl.org/coar/resource_type/c_5794info:ar-repo/semantics/documentoDeConferenciaapplication/pdfhttp://sedici.unlp.edu.ar/handle/10915/185211enginfo:eu-repo/semantics/altIdentifier/issn/1666-1079info:eu-repo/semantics/openAccesshttp://creativecommons.org/licenses/by-nc-sa/4.0/Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International (CC BY-NC-SA 4.0)reponame:SEDICI (UNLP)instname:Universidad Nacional de La Platainstacron:UNLP2025-10-15T11:42:27Zoai:sedici.unlp.edu.ar:10915/185211Institucionalhttp://sedici.unlp.edu.ar/Universidad públicaNo correspondehttp://sedici.unlp.edu.ar/oai/snrdalira@sedici.unlp.edu.arArgentinaNo correspondeNo correspondeNo correspondeopendoar:13292025-10-15 11:42:28.012SEDICI (UNLP) - Universidad Nacional de La Platafalse
dc.title.none.fl_str_mv NNGen: a powerful tool for the implementation of Artificial Neural Networks on a chip
title NNGen: a powerful tool for the implementation of Artificial Neural Networks on a chip
spellingShingle NNGen: a powerful tool for the implementation of Artificial Neural Networks on a chip
Tosini, Marcelo Alejandro
Ciencias Informáticas
Artificial Neural Networks
FPGA
NNGen
title_short NNGen: a powerful tool for the implementation of Artificial Neural Networks on a chip
title_full NNGen: a powerful tool for the implementation of Artificial Neural Networks on a chip
title_fullStr NNGen: a powerful tool for the implementation of Artificial Neural Networks on a chip
title_full_unstemmed NNGen: a powerful tool for the implementation of Artificial Neural Networks on a chip
title_sort NNGen: a powerful tool for the implementation of Artificial Neural Networks on a chip
dc.creator.none.fl_str_mv Tosini, Marcelo Alejandro
author Tosini, Marcelo Alejandro
author_facet Tosini, Marcelo Alejandro
author_role author
dc.subject.none.fl_str_mv Ciencias Informáticas
Artificial Neural Networks
FPGA
NNGen
topic Ciencias Informáticas
Artificial Neural Networks
FPGA
NNGen
dc.description.none.fl_txt_mv A design and development tool to achieve artificial neural networks (ANN) implemented in a Field Programmable Gate Array (FPGA), is presented in this article. Its main components and functionality are thoroughly described. This tool, called NNGen, allows constructing digital ANN, which are easily programmable selecting different parameters. The output of such programming task is directly VHDL code to be ported to, in principle, any chip of the mentioned kind. A case study of a multilayer perceptron applied to weather forecast that was fully designed with NNGen, is also analyzed to obtain some conclusions.
Sociedad Argentina de Informática e Investigación Operativa
description A design and development tool to achieve artificial neural networks (ANN) implemented in a Field Programmable Gate Array (FPGA), is presented in this article. Its main components and functionality are thoroughly described. This tool, called NNGen, allows constructing digital ANN, which are easily programmable selecting different parameters. The output of such programming task is directly VHDL code to be ported to, in principle, any chip of the mentioned kind. A case study of a multilayer perceptron applied to weather forecast that was fully designed with NNGen, is also analyzed to obtain some conclusions.
publishDate 2003
dc.date.none.fl_str_mv 2003-09
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info:eu-repo/semantics/publishedVersion
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format conferenceObject
status_str publishedVersion
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url http://sedici.unlp.edu.ar/handle/10915/185211
dc.language.none.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv info:eu-repo/semantics/altIdentifier/issn/1666-1079
dc.rights.none.fl_str_mv info:eu-repo/semantics/openAccess
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Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International (CC BY-NC-SA 4.0)
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