A fast CORDIC co-processor architecture for digital signal processing applications

Autores
Giacomantone, Javier; Villagarcía Wanza, Horacio A.; Bria, Oscar N.
Año de publicación
2000
Idioma
inglés
Tipo de recurso
documento de conferencia
Estado
versión publicada
Descripción
The coordinate rotational digital computer (CORDIC) is an arithmetic algorithm, which has been used for arithmetic units in the fast computing of elementary functions and for special purpose hardware in programmable logic devices. This paper describes a classification method that can be used for the possible applications of the algorithm and the architecture that is required for fast hardware computing of the algorithm.
Área: Redes - Sistemas Operativos - Sistemas de Tiempo Real - Arquitectura de Procesadores
Red de Universidades con Carreras en Informática (RedUNCI)
Materia
Ciencias Informáticas
Architectures
Computer arithmetic
Algorithms
Hardware
Signal processing
Nivel de accesibilidad
acceso abierto
Condiciones de uso
http://creativecommons.org/licenses/by-nc-sa/2.5/ar/
Repositorio
SEDICI (UNLP)
Institución
Universidad Nacional de La Plata
OAI Identificador
oai:sedici.unlp.edu.ar:10915/23679
Acceder
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oai_identifier_str oai:sedici.unlp.edu.ar:10915/23679
network_acronym_str SEDICI
repository_id_str 1329
network_name_str SEDICI (UNLP)
spelling A fast CORDIC co-processor architecture for digital signal processing applicationsGiacomantone, JavierVillagarcía Wanza, Horacio A.Bria, Oscar N.Ciencias InformáticasArchitecturesComputer arithmeticAlgorithmsHardwareSignal processingThe coordinate rotational digital computer (CORDIC) is an arithmetic algorithm, which has been used for arithmetic units in the fast computing of elementary functions and for special purpose hardware in programmable logic devices. This paper describes a classification method that can be used for the possible applications of the algorithm and the architecture that is required for fast hardware computing of the algorithm.Área: Redes - Sistemas Operativos - Sistemas de Tiempo Real - Arquitectura de ProcesadoresRed de Universidades con Carreras en Informática (RedUNCI)2000-10info:eu-repo/semantics/conferenceObjectinfo:eu-repo/semantics/publishedVersionObjeto de conferenciahttp://purl.org/coar/resource_type/c_5794info:ar-repo/semantics/documentoDeConferenciaapplication/pdfhttp://sedici.unlp.edu.ar/handle/10915/23679enginfo:eu-repo/semantics/openAccesshttp://creativecommons.org/licenses/by-nc-sa/2.5/ar/Creative Commons Attribution-NonCommercial-ShareAlike 2.5 Argentina (CC BY-NC-SA 2.5)reponame:SEDICI (UNLP)instname:Universidad Nacional de La Platainstacron:UNLP2025-09-17T09:38:55Zoai:sedici.unlp.edu.ar:10915/23679Institucionalhttp://sedici.unlp.edu.ar/Universidad públicaNo correspondehttp://sedici.unlp.edu.ar/oai/snrdalira@sedici.unlp.edu.arArgentinaNo correspondeNo correspondeNo correspondeopendoar:13292025-09-17 09:38:55.807SEDICI (UNLP) - Universidad Nacional de La Platafalse
dc.title.none.fl_str_mv A fast CORDIC co-processor architecture for digital signal processing applications
title A fast CORDIC co-processor architecture for digital signal processing applications
spellingShingle A fast CORDIC co-processor architecture for digital signal processing applications
Giacomantone, Javier
Ciencias Informáticas
Architectures
Computer arithmetic
Algorithms
Hardware
Signal processing
title_short A fast CORDIC co-processor architecture for digital signal processing applications
title_full A fast CORDIC co-processor architecture for digital signal processing applications
title_fullStr A fast CORDIC co-processor architecture for digital signal processing applications
title_full_unstemmed A fast CORDIC co-processor architecture for digital signal processing applications
title_sort A fast CORDIC co-processor architecture for digital signal processing applications
dc.creator.none.fl_str_mv Giacomantone, Javier
Villagarcía Wanza, Horacio A.
Bria, Oscar N.
author Giacomantone, Javier
author_facet Giacomantone, Javier
Villagarcía Wanza, Horacio A.
Bria, Oscar N.
author_role author
author2 Villagarcía Wanza, Horacio A.
Bria, Oscar N.
author2_role author
author
dc.subject.none.fl_str_mv Ciencias Informáticas
Architectures
Computer arithmetic
Algorithms
Hardware
Signal processing
topic Ciencias Informáticas
Architectures
Computer arithmetic
Algorithms
Hardware
Signal processing
dc.description.none.fl_txt_mv The coordinate rotational digital computer (CORDIC) is an arithmetic algorithm, which has been used for arithmetic units in the fast computing of elementary functions and for special purpose hardware in programmable logic devices. This paper describes a classification method that can be used for the possible applications of the algorithm and the architecture that is required for fast hardware computing of the algorithm.
Área: Redes - Sistemas Operativos - Sistemas de Tiempo Real - Arquitectura de Procesadores
Red de Universidades con Carreras en Informática (RedUNCI)
description The coordinate rotational digital computer (CORDIC) is an arithmetic algorithm, which has been used for arithmetic units in the fast computing of elementary functions and for special purpose hardware in programmable logic devices. This paper describes a classification method that can be used for the possible applications of the algorithm and the architecture that is required for fast hardware computing of the algorithm.
publishDate 2000
dc.date.none.fl_str_mv 2000-10
dc.type.none.fl_str_mv info:eu-repo/semantics/conferenceObject
info:eu-repo/semantics/publishedVersion
Objeto de conferencia
http://purl.org/coar/resource_type/c_5794
info:ar-repo/semantics/documentoDeConferencia
format conferenceObject
status_str publishedVersion
dc.identifier.none.fl_str_mv http://sedici.unlp.edu.ar/handle/10915/23679
url http://sedici.unlp.edu.ar/handle/10915/23679
dc.language.none.fl_str_mv eng
language eng
dc.rights.none.fl_str_mv info:eu-repo/semantics/openAccess
http://creativecommons.org/licenses/by-nc-sa/2.5/ar/
Creative Commons Attribution-NonCommercial-ShareAlike 2.5 Argentina (CC BY-NC-SA 2.5)
eu_rights_str_mv openAccess
rights_invalid_str_mv http://creativecommons.org/licenses/by-nc-sa/2.5/ar/
Creative Commons Attribution-NonCommercial-ShareAlike 2.5 Argentina (CC BY-NC-SA 2.5)
dc.format.none.fl_str_mv application/pdf
dc.source.none.fl_str_mv reponame:SEDICI (UNLP)
instname:Universidad Nacional de La Plata
instacron:UNLP
reponame_str SEDICI (UNLP)
collection SEDICI (UNLP)
instname_str Universidad Nacional de La Plata
instacron_str UNLP
institution UNLP
repository.name.fl_str_mv SEDICI (UNLP) - Universidad Nacional de La Plata
repository.mail.fl_str_mv alira@sedici.unlp.edu.ar
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score 13.001348

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