Custom architectures for fuzzy and neural networks controllers

Autores
Acosta, Nelson; Tosini, Marcelo Alejandro
Año de publicación
2002
Idioma
inglés
Tipo de recurso
artículo
Estado
versión publicada
Descripción
Standard hardware, dedicated microcontroller or application specific circuits can implement fuzzy logic or neural network controllers. This paper presents efficient architecture approaches to develop controllers using specific circuits. A generator uses several tools that allow translating the initial problem specification to a specific circuit implementation, by using HDL descriptions. These HDL description files can be synthesized to get the FPGA configuration bit-stream.
Facultad de Informática
Materia
Ciencias Informáticas
Neural nets
INTEGRATED CIRCUITS
Channels and controllers
Nivel de accesibilidad
acceso abierto
Condiciones de uso
http://creativecommons.org/licenses/by-nc/3.0/
Repositorio
SEDICI (UNLP)
Institución
Universidad Nacional de La Plata
OAI Identificador
oai:sedici.unlp.edu.ar:10915/9440
Acceder
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oai_identifier_str oai:sedici.unlp.edu.ar:10915/9440
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repository_id_str 1329
network_name_str SEDICI (UNLP)
spelling Custom architectures for fuzzy and neural networks controllersAcosta, NelsonTosini, Marcelo AlejandroCiencias InformáticasNeural netsINTEGRATED CIRCUITSChannels and controllersStandard hardware, dedicated microcontroller or application specific circuits can implement fuzzy logic or neural network controllers. This paper presents efficient architecture approaches to develop controllers using specific circuits. A generator uses several tools that allow translating the initial problem specification to a specific circuit implementation, by using HDL descriptions. These HDL description files can be synthesized to get the FPGA configuration bit-stream.Facultad de Informática2002info:eu-repo/semantics/articleinfo:eu-repo/semantics/publishedVersionArticulohttp://purl.org/coar/resource_type/c_6501info:ar-repo/semantics/articuloapplication/pdf9-15http://sedici.unlp.edu.ar/handle/10915/9440enginfo:eu-repo/semantics/altIdentifier/url/http://journal.info.unlp.edu.ar/wp-content/uploads/JCST-Oct02-2.pdfinfo:eu-repo/semantics/altIdentifier/issn/1666-6038info:eu-repo/semantics/openAccesshttp://creativecommons.org/licenses/by-nc/3.0/Creative Commons Attribution-NonCommercial 3.0 Unported (CC BY-NC 3.0)reponame:SEDICI (UNLP)instname:Universidad Nacional de La Platainstacron:UNLP2025-09-03T10:23:30Zoai:sedici.unlp.edu.ar:10915/9440Institucionalhttp://sedici.unlp.edu.ar/Universidad públicaNo correspondehttp://sedici.unlp.edu.ar/oai/snrdalira@sedici.unlp.edu.arArgentinaNo correspondeNo correspondeNo correspondeopendoar:13292025-09-03 10:23:30.813SEDICI (UNLP) - Universidad Nacional de La Platafalse
dc.title.none.fl_str_mv Custom architectures for fuzzy and neural networks controllers
title Custom architectures for fuzzy and neural networks controllers
spellingShingle Custom architectures for fuzzy and neural networks controllers
Acosta, Nelson
Ciencias Informáticas
Neural nets
INTEGRATED CIRCUITS
Channels and controllers
title_short Custom architectures for fuzzy and neural networks controllers
title_full Custom architectures for fuzzy and neural networks controllers
title_fullStr Custom architectures for fuzzy and neural networks controllers
title_full_unstemmed Custom architectures for fuzzy and neural networks controllers
title_sort Custom architectures for fuzzy and neural networks controllers
dc.creator.none.fl_str_mv Acosta, Nelson
Tosini, Marcelo Alejandro
author Acosta, Nelson
author_facet Acosta, Nelson
Tosini, Marcelo Alejandro
author_role author
author2 Tosini, Marcelo Alejandro
author2_role author
dc.subject.none.fl_str_mv Ciencias Informáticas
Neural nets
INTEGRATED CIRCUITS
Channels and controllers
topic Ciencias Informáticas
Neural nets
INTEGRATED CIRCUITS
Channels and controllers
dc.description.none.fl_txt_mv Standard hardware, dedicated microcontroller or application specific circuits can implement fuzzy logic or neural network controllers. This paper presents efficient architecture approaches to develop controllers using specific circuits. A generator uses several tools that allow translating the initial problem specification to a specific circuit implementation, by using HDL descriptions. These HDL description files can be synthesized to get the FPGA configuration bit-stream.
Facultad de Informática
description Standard hardware, dedicated microcontroller or application specific circuits can implement fuzzy logic or neural network controllers. This paper presents efficient architecture approaches to develop controllers using specific circuits. A generator uses several tools that allow translating the initial problem specification to a specific circuit implementation, by using HDL descriptions. These HDL description files can be synthesized to get the FPGA configuration bit-stream.
publishDate 2002
dc.date.none.fl_str_mv 2002
dc.type.none.fl_str_mv info:eu-repo/semantics/article
info:eu-repo/semantics/publishedVersion
Articulo
http://purl.org/coar/resource_type/c_6501
info:ar-repo/semantics/articulo
format article
status_str publishedVersion
dc.identifier.none.fl_str_mv http://sedici.unlp.edu.ar/handle/10915/9440
url http://sedici.unlp.edu.ar/handle/10915/9440
dc.language.none.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv info:eu-repo/semantics/altIdentifier/url/http://journal.info.unlp.edu.ar/wp-content/uploads/JCST-Oct02-2.pdf
info:eu-repo/semantics/altIdentifier/issn/1666-6038
dc.rights.none.fl_str_mv info:eu-repo/semantics/openAccess
http://creativecommons.org/licenses/by-nc/3.0/
Creative Commons Attribution-NonCommercial 3.0 Unported (CC BY-NC 3.0)
eu_rights_str_mv openAccess
rights_invalid_str_mv http://creativecommons.org/licenses/by-nc/3.0/
Creative Commons Attribution-NonCommercial 3.0 Unported (CC BY-NC 3.0)
dc.format.none.fl_str_mv application/pdf
9-15
dc.source.none.fl_str_mv reponame:SEDICI (UNLP)
instname:Universidad Nacional de La Plata
instacron:UNLP
reponame_str SEDICI (UNLP)
collection SEDICI (UNLP)
instname_str Universidad Nacional de La Plata
instacron_str UNLP
institution UNLP
repository.name.fl_str_mv SEDICI (UNLP) - Universidad Nacional de La Plata
repository.mail.fl_str_mv alira@sedici.unlp.edu.ar
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score 13.13397

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