Cita APA

Sanchez, R. M., Reyes, B. T., Pola, A. L., & Hueda, M. R. (2016). An FPGA-based emulation platform for evaluation of time-interleaved ADC calibration systems. Web

Citación estilo Chicago

Sanchez, Raúl M., Benjamín T. Reyes, Ariel L. Pola, and Mario R. Hueda. An FPGA-based Emulation Platform for Evaluation of Time-interleaved ADC Calibration Systems. 2016.

Cita MLA

Sanchez, Raúl M., Benjamín T. Reyes, Ariel L. Pola, and Mario R. Hueda. An FPGA-based Emulation Platform for Evaluation of Time-interleaved ADC Calibration Systems. 2016.