Unified Power Modeling Design for Various Raspberry Pi Generations Analyzing Different Statistical Methods

Autores
Paniego, Juan Manuel; Libutti, Leandro Ariel; Pi Puig, Martín; Chichizola, Franco; De Giusti, Laura Cristina; Naiouf, Marcelo; De Giusti, Armando Eduardo
Año de publicación
2019
Idioma
español castellano
Tipo de recurso
documento de conferencia
Estado
versión publicada
Descripción
Monitoring processor power is important to define strategies that allow reducing energy costs in computer systems. Today, processors have a large number of counters that allow monitoring system events such as CPU usage, memory, cache, and so forth. In previous works, it has been shown that parallel application consumption can be predicted through these events, but only for a given SBC board architecture. In this article, we analyze the portability of a power prediction statistical model on a new generation of Raspberry boards. Our experiments focus on the optimizations using different statistical methods so as to systematically reduce the final estimation error in the architectures analyzed. The final models yield an average error between 2.24% and 4.45%, increasing computational cost as the prediction error decreases.
Trabajo publicado en Pesado, P., Arroyo, M. (eds.). Computer Science – CACIC 2019. Communications in Computer and Information Science (CCIS), vol. 1184. Springer, Cham.
Instituto de Investigación en Informática
Comisión de Investigaciones Científicas de la provincia de Buenos Aires
Consejo Nacional de Investigaciones Científicas y Técnicas
Materia
Informática
Power
Raspberry Pi
Hardware counters
Modeling
Statistical models
Nivel de accesibilidad
acceso abierto
Condiciones de uso
http://creativecommons.org/licenses/by-nc-sa/4.0/
Repositorio
SEDICI (UNLP)
Institución
Universidad Nacional de La Plata
OAI Identificador
oai:sedici.unlp.edu.ar:10915/136167
Acceder
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oai_identifier_str oai:sedici.unlp.edu.ar:10915/136167
network_acronym_str SEDICI
repository_id_str 1329
network_name_str SEDICI (UNLP)
spelling Unified Power Modeling Design for Various Raspberry Pi Generations Analyzing Different Statistical MethodsPaniego, Juan ManuelLibutti, Leandro ArielPi Puig, MartínChichizola, FrancoDe Giusti, Laura CristinaNaiouf, MarceloDe Giusti, Armando EduardoInformáticaPowerRaspberry PiHardware countersModelingStatistical modelsMonitoring processor power is important to define strategies that allow reducing energy costs in computer systems. Today, processors have a large number of counters that allow monitoring system events such as CPU usage, memory, cache, and so forth. In previous works, it has been shown that parallel application consumption can be predicted through these events, but only for a given SBC board architecture. In this article, we analyze the portability of a power prediction statistical model on a new generation of Raspberry boards. Our experiments focus on the optimizations using different statistical methods so as to systematically reduce the final estimation error in the architectures analyzed. The final models yield an average error between 2.24% and 4.45%, increasing computational cost as the prediction error decreases.Trabajo publicado en Pesado, P., Arroyo, M. (eds.). Computer Science – CACIC 2019. Communications in Computer and Information Science (CCIS), vol. 1184. Springer, Cham.Instituto de Investigación en InformáticaComisión de Investigaciones Científicas de la provincia de Buenos AiresConsejo Nacional de Investigaciones Científicas y Técnicas2019info:eu-repo/semantics/conferenceObjectinfo:eu-repo/semantics/publishedVersionObjeto de conferenciahttp://purl.org/coar/resource_type/c_5794info:ar-repo/semantics/documentoDeConferenciaapplication/pdf53-65http://sedici.unlp.edu.ar/handle/10915/136167spainfo:eu-repo/semantics/altIdentifier/isbn/978-3-030-48325-8info:eu-repo/semantics/altIdentifier/issn/1865-0929info:eu-repo/semantics/altIdentifier/issn/1865-0937info:eu-repo/semantics/altIdentifier/doi/10.1007/978-3-030-48325-8_4info:eu-repo/semantics/openAccesshttp://creativecommons.org/licenses/by-nc-sa/4.0/Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International (CC BY-NC-SA 4.0)reponame:SEDICI (UNLP)instname:Universidad Nacional de La Platainstacron:UNLP2025-09-03T11:04:23Zoai:sedici.unlp.edu.ar:10915/136167Institucionalhttp://sedici.unlp.edu.ar/Universidad públicaNo correspondehttp://sedici.unlp.edu.ar/oai/snrdalira@sedici.unlp.edu.arArgentinaNo correspondeNo correspondeNo correspondeopendoar:13292025-09-03 11:04:23.46SEDICI (UNLP) - Universidad Nacional de La Platafalse
dc.title.none.fl_str_mv Unified Power Modeling Design for Various Raspberry Pi Generations Analyzing Different Statistical Methods
title Unified Power Modeling Design for Various Raspberry Pi Generations Analyzing Different Statistical Methods
spellingShingle Unified Power Modeling Design for Various Raspberry Pi Generations Analyzing Different Statistical Methods
Paniego, Juan Manuel
Informática
Power
Raspberry Pi
Hardware counters
Modeling
Statistical models
title_short Unified Power Modeling Design for Various Raspberry Pi Generations Analyzing Different Statistical Methods
title_full Unified Power Modeling Design for Various Raspberry Pi Generations Analyzing Different Statistical Methods
title_fullStr Unified Power Modeling Design for Various Raspberry Pi Generations Analyzing Different Statistical Methods
title_full_unstemmed Unified Power Modeling Design for Various Raspberry Pi Generations Analyzing Different Statistical Methods
title_sort Unified Power Modeling Design for Various Raspberry Pi Generations Analyzing Different Statistical Methods
dc.creator.none.fl_str_mv Paniego, Juan Manuel
Libutti, Leandro Ariel
Pi Puig, Martín
Chichizola, Franco
De Giusti, Laura Cristina
Naiouf, Marcelo
De Giusti, Armando Eduardo
author Paniego, Juan Manuel
author_facet Paniego, Juan Manuel
Libutti, Leandro Ariel
Pi Puig, Martín
Chichizola, Franco
De Giusti, Laura Cristina
Naiouf, Marcelo
De Giusti, Armando Eduardo
author_role author
author2 Libutti, Leandro Ariel
Pi Puig, Martín
Chichizola, Franco
De Giusti, Laura Cristina
Naiouf, Marcelo
De Giusti, Armando Eduardo
author2_role author
author
author
author
author
author
dc.subject.none.fl_str_mv Informática
Power
Raspberry Pi
Hardware counters
Modeling
Statistical models
topic Informática
Power
Raspberry Pi
Hardware counters
Modeling
Statistical models
dc.description.none.fl_txt_mv Monitoring processor power is important to define strategies that allow reducing energy costs in computer systems. Today, processors have a large number of counters that allow monitoring system events such as CPU usage, memory, cache, and so forth. In previous works, it has been shown that parallel application consumption can be predicted through these events, but only for a given SBC board architecture. In this article, we analyze the portability of a power prediction statistical model on a new generation of Raspberry boards. Our experiments focus on the optimizations using different statistical methods so as to systematically reduce the final estimation error in the architectures analyzed. The final models yield an average error between 2.24% and 4.45%, increasing computational cost as the prediction error decreases.
Trabajo publicado en Pesado, P., Arroyo, M. (eds.). Computer Science – CACIC 2019. Communications in Computer and Information Science (CCIS), vol. 1184. Springer, Cham.
Instituto de Investigación en Informática
Comisión de Investigaciones Científicas de la provincia de Buenos Aires
Consejo Nacional de Investigaciones Científicas y Técnicas
description Monitoring processor power is important to define strategies that allow reducing energy costs in computer systems. Today, processors have a large number of counters that allow monitoring system events such as CPU usage, memory, cache, and so forth. In previous works, it has been shown that parallel application consumption can be predicted through these events, but only for a given SBC board architecture. In this article, we analyze the portability of a power prediction statistical model on a new generation of Raspberry boards. Our experiments focus on the optimizations using different statistical methods so as to systematically reduce the final estimation error in the architectures analyzed. The final models yield an average error between 2.24% and 4.45%, increasing computational cost as the prediction error decreases.
publishDate 2019
dc.date.none.fl_str_mv 2019
dc.type.none.fl_str_mv info:eu-repo/semantics/conferenceObject
info:eu-repo/semantics/publishedVersion
Objeto de conferencia
http://purl.org/coar/resource_type/c_5794
info:ar-repo/semantics/documentoDeConferencia
format conferenceObject
status_str publishedVersion
dc.identifier.none.fl_str_mv http://sedici.unlp.edu.ar/handle/10915/136167
url http://sedici.unlp.edu.ar/handle/10915/136167
dc.language.none.fl_str_mv spa
language spa
dc.relation.none.fl_str_mv info:eu-repo/semantics/altIdentifier/isbn/978-3-030-48325-8
info:eu-repo/semantics/altIdentifier/issn/1865-0929
info:eu-repo/semantics/altIdentifier/issn/1865-0937
info:eu-repo/semantics/altIdentifier/doi/10.1007/978-3-030-48325-8_4
dc.rights.none.fl_str_mv info:eu-repo/semantics/openAccess
http://creativecommons.org/licenses/by-nc-sa/4.0/
Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International (CC BY-NC-SA 4.0)
eu_rights_str_mv openAccess
rights_invalid_str_mv http://creativecommons.org/licenses/by-nc-sa/4.0/
Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International (CC BY-NC-SA 4.0)
dc.format.none.fl_str_mv application/pdf
53-65
dc.source.none.fl_str_mv reponame:SEDICI (UNLP)
instname:Universidad Nacional de La Plata
instacron:UNLP
reponame_str SEDICI (UNLP)
collection SEDICI (UNLP)
instname_str Universidad Nacional de La Plata
instacron_str UNLP
institution UNLP
repository.name.fl_str_mv SEDICI (UNLP) - Universidad Nacional de La Plata
repository.mail.fl_str_mv alira@sedici.unlp.edu.ar
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