Software for multi-core processor-based architectures : Automatic detection of concurrency errors

Autores
Frati, Fernando Emmanuel
Año de publicación
2015
Idioma
inglés
Tipo de recurso
reseña artículo
Estado
versión publicada
Descripción
The main objective of this paper is to propose a software implementation model for concurrency error detection tools that allows reducing process overhead without decreasing its detection capacity. The general model proposed uses software dynamic instrumentation in such a way that an analysis routine can be activated from a signal generated by a hardware event that indicates the possibility of an error occurring. The results obtained showed that, for the case study (an atomicity violation detection algorithm called AVIO), the version that uses the model proposed can detect the same bugs as the original version, but in only 25% of the time (in average) required by it.
Tesis presentada el 19 de marzo de 2015 por el autor para obtener el título de Doctor en Ciencias Informáticas.
Es revisión de: http://sedici.unlp.edu.ar/handle/10915/44643
Facultad de Informática
Materia
Ciencias Informáticas
Hardware
instrumentación dinámica
contadores hardware
Processors
errores de concurrencia
HPC
Nivel de accesibilidad
acceso abierto
Condiciones de uso
http://creativecommons.org/licenses/by/3.0/
Repositorio
SEDICI (UNLP)
Institución
Universidad Nacional de La Plata
OAI Identificador
oai:sedici.unlp.edu.ar:10915/50204
Acceder
id SEDICI_9e832b39912e82592c02a8eef46011b7
oai_identifier_str oai:sedici.unlp.edu.ar:10915/50204
network_acronym_str SEDICI
repository_id_str 1329
network_name_str SEDICI (UNLP)
spelling Software for multi-core processor-based architectures : Automatic detection of concurrency errorsFrati, Fernando EmmanuelCiencias InformáticasHardwareinstrumentación dinámicacontadores hardwareProcessorserrores de concurrenciaHPCThe main objective of this paper is to propose a software implementation model for concurrency error detection tools that allows reducing process overhead without decreasing its detection capacity. The general model proposed uses software dynamic instrumentation in such a way that an analysis routine can be activated from a signal generated by a hardware event that indicates the possibility of an error occurring. The results obtained showed that, for the case study (an atomicity violation detection algorithm called AVIO), the version that uses the model proposed can detect the same bugs as the original version, but in only 25% of the time (in average) required by it.Tesis presentada el 19 de marzo de 2015 por el autor para obtener el título de Doctor en Ciencias Informáticas.Es revisión de: http://sedici.unlp.edu.ar/handle/10915/44643Facultad de Informática2015-11info:eu-repo/semantics/reviewinfo:eu-repo/semantics/publishedVersionRevisionhttp://purl.org/coar/resource_type/c_dcae04bcinfo:ar-repo/semantics/resenaArticuloapplication/pdf154-156http://sedici.unlp.edu.ar/handle/10915/50204enginfo:eu-repo/semantics/altIdentifier/url/http://journal.info.unlp.edu.ar/wp-content/uploads/JCST41-TO-1.pdfinfo:eu-repo/semantics/altIdentifier/issn/1666-6038info:eu-repo/semantics/openAccesshttp://creativecommons.org/licenses/by/3.0/Creative Commons Attribution 3.0 Unported (CC BY 3.0)reponame:SEDICI (UNLP)instname:Universidad Nacional de La Platainstacron:UNLP2025-09-03T10:36:32Zoai:sedici.unlp.edu.ar:10915/50204Institucionalhttp://sedici.unlp.edu.ar/Universidad públicaNo correspondehttp://sedici.unlp.edu.ar/oai/snrdalira@sedici.unlp.edu.arArgentinaNo correspondeNo correspondeNo correspondeopendoar:13292025-09-03 10:36:32.66SEDICI (UNLP) - Universidad Nacional de La Platafalse
dc.title.none.fl_str_mv Software for multi-core processor-based architectures : Automatic detection of concurrency errors
title Software for multi-core processor-based architectures : Automatic detection of concurrency errors
spellingShingle Software for multi-core processor-based architectures : Automatic detection of concurrency errors
Frati, Fernando Emmanuel
Ciencias Informáticas
Hardware
instrumentación dinámica
contadores hardware
Processors
errores de concurrencia
HPC
title_short Software for multi-core processor-based architectures : Automatic detection of concurrency errors
title_full Software for multi-core processor-based architectures : Automatic detection of concurrency errors
title_fullStr Software for multi-core processor-based architectures : Automatic detection of concurrency errors
title_full_unstemmed Software for multi-core processor-based architectures : Automatic detection of concurrency errors
title_sort Software for multi-core processor-based architectures : Automatic detection of concurrency errors
dc.creator.none.fl_str_mv Frati, Fernando Emmanuel
author Frati, Fernando Emmanuel
author_facet Frati, Fernando Emmanuel
author_role author
dc.subject.none.fl_str_mv Ciencias Informáticas
Hardware
instrumentación dinámica
contadores hardware
Processors
errores de concurrencia
HPC
topic Ciencias Informáticas
Hardware
instrumentación dinámica
contadores hardware
Processors
errores de concurrencia
HPC
dc.description.none.fl_txt_mv The main objective of this paper is to propose a software implementation model for concurrency error detection tools that allows reducing process overhead without decreasing its detection capacity. The general model proposed uses software dynamic instrumentation in such a way that an analysis routine can be activated from a signal generated by a hardware event that indicates the possibility of an error occurring. The results obtained showed that, for the case study (an atomicity violation detection algorithm called AVIO), the version that uses the model proposed can detect the same bugs as the original version, but in only 25% of the time (in average) required by it.
Tesis presentada el 19 de marzo de 2015 por el autor para obtener el título de Doctor en Ciencias Informáticas.
Es revisión de: http://sedici.unlp.edu.ar/handle/10915/44643
Facultad de Informática
description The main objective of this paper is to propose a software implementation model for concurrency error detection tools that allows reducing process overhead without decreasing its detection capacity. The general model proposed uses software dynamic instrumentation in such a way that an analysis routine can be activated from a signal generated by a hardware event that indicates the possibility of an error occurring. The results obtained showed that, for the case study (an atomicity violation detection algorithm called AVIO), the version that uses the model proposed can detect the same bugs as the original version, but in only 25% of the time (in average) required by it.
publishDate 2015
dc.date.none.fl_str_mv 2015-11
dc.type.none.fl_str_mv info:eu-repo/semantics/review
info:eu-repo/semantics/publishedVersion
Revision
http://purl.org/coar/resource_type/c_dcae04bc
info:ar-repo/semantics/resenaArticulo
format review
status_str publishedVersion
dc.identifier.none.fl_str_mv http://sedici.unlp.edu.ar/handle/10915/50204
url http://sedici.unlp.edu.ar/handle/10915/50204
dc.language.none.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv info:eu-repo/semantics/altIdentifier/url/http://journal.info.unlp.edu.ar/wp-content/uploads/JCST41-TO-1.pdf
info:eu-repo/semantics/altIdentifier/issn/1666-6038
dc.rights.none.fl_str_mv info:eu-repo/semantics/openAccess
http://creativecommons.org/licenses/by/3.0/
Creative Commons Attribution 3.0 Unported (CC BY 3.0)
eu_rights_str_mv openAccess
rights_invalid_str_mv http://creativecommons.org/licenses/by/3.0/
Creative Commons Attribution 3.0 Unported (CC BY 3.0)
dc.format.none.fl_str_mv application/pdf
154-156
dc.source.none.fl_str_mv reponame:SEDICI (UNLP)
instname:Universidad Nacional de La Plata
instacron:UNLP
reponame_str SEDICI (UNLP)
collection SEDICI (UNLP)
instname_str Universidad Nacional de La Plata
instacron_str UNLP
institution UNLP
repository.name.fl_str_mv SEDICI (UNLP) - Universidad Nacional de La Plata
repository.mail.fl_str_mv alira@sedici.unlp.edu.ar
_version_ 1842260220017901568
score 13.13397

Publicaciones similares