A model for the automatic mapping of tasks to processors in heterogeneous multi-cluster architectures

Autores
De Giusti, Laura Cristina; Chichizola, Franco; Naiouf, Marcelo; Ripoll, Ana; De Giusti, Armando Eduardo
Año de publicación
2007
Idioma
inglés
Tipo de recurso
artículo
Estado
versión publicada
Descripción
This paper discusses automatic mapping methods for concurrent tasks to processors applying graph analysis for the relation among tasks, in which processing and communicating times are incorporated. Starting by an analysis in which processors are homogeneous and data transmission times do not depend on the processors that are communicating (a typical case in homogeneous clusters), we progress to extend the model to heterogeneous processors having the possibility of different communication levels, applicable to a multicluster. Some results obtained with the model and future work lines are presented, particularly, the possibility of obtaining the required optimal number of processors, keeping a constant efficiency level.
Facultad de Informática
Materia
Ciencias Informáticas
Parallel
Modeling and prediction
Nivel de accesibilidad
acceso abierto
Condiciones de uso
http://creativecommons.org/licenses/by-nc/3.0/
Repositorio
SEDICI (UNLP)
Institución
Universidad Nacional de La Plata
OAI Identificador
oai:sedici.unlp.edu.ar:10915/9526

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network_name_str SEDICI (UNLP)
spelling A model for the automatic mapping of tasks to processors in heterogeneous multi-cluster architecturesDe Giusti, Laura CristinaChichizola, FrancoNaiouf, MarceloRipoll, AnaDe Giusti, Armando EduardoCiencias InformáticasParallelModeling and predictionThis paper discusses automatic mapping methods for concurrent tasks to processors applying graph analysis for the relation among tasks, in which processing and communicating times are incorporated. Starting by an analysis in which processors are homogeneous and data transmission times do not depend on the processors that are communicating (a typical case in homogeneous clusters), we progress to extend the model to heterogeneous processors having the possibility of different communication levels, applicable to a multicluster. Some results obtained with the model and future work lines are presented, particularly, the possibility of obtaining the required optimal number of processors, keeping a constant efficiency level.Facultad de Informática2007-04info:eu-repo/semantics/articleinfo:eu-repo/semantics/publishedVersionArticulohttp://purl.org/coar/resource_type/c_6501info:ar-repo/semantics/articuloapplication/pdf39-44http://sedici.unlp.edu.ar/handle/10915/9526enginfo:eu-repo/semantics/altIdentifier/url/http://journal.info.unlp.edu.ar/wp-content/uploads/JCST-Mar07-7.pdfinfo:eu-repo/semantics/altIdentifier/issn/1666-6038info:eu-repo/semantics/openAccesshttp://creativecommons.org/licenses/by-nc/3.0/Creative Commons Attribution-NonCommercial 3.0 Unported (CC BY-NC 3.0)reponame:SEDICI (UNLP)instname:Universidad Nacional de La Platainstacron:UNLP2025-09-29T10:50:44Zoai:sedici.unlp.edu.ar:10915/9526Institucionalhttp://sedici.unlp.edu.ar/Universidad públicaNo correspondehttp://sedici.unlp.edu.ar/oai/snrdalira@sedici.unlp.edu.arArgentinaNo correspondeNo correspondeNo correspondeopendoar:13292025-09-29 10:50:44.289SEDICI (UNLP) - Universidad Nacional de La Platafalse
dc.title.none.fl_str_mv A model for the automatic mapping of tasks to processors in heterogeneous multi-cluster architectures
title A model for the automatic mapping of tasks to processors in heterogeneous multi-cluster architectures
spellingShingle A model for the automatic mapping of tasks to processors in heterogeneous multi-cluster architectures
De Giusti, Laura Cristina
Ciencias Informáticas
Parallel
Modeling and prediction
title_short A model for the automatic mapping of tasks to processors in heterogeneous multi-cluster architectures
title_full A model for the automatic mapping of tasks to processors in heterogeneous multi-cluster architectures
title_fullStr A model for the automatic mapping of tasks to processors in heterogeneous multi-cluster architectures
title_full_unstemmed A model for the automatic mapping of tasks to processors in heterogeneous multi-cluster architectures
title_sort A model for the automatic mapping of tasks to processors in heterogeneous multi-cluster architectures
dc.creator.none.fl_str_mv De Giusti, Laura Cristina
Chichizola, Franco
Naiouf, Marcelo
Ripoll, Ana
De Giusti, Armando Eduardo
author De Giusti, Laura Cristina
author_facet De Giusti, Laura Cristina
Chichizola, Franco
Naiouf, Marcelo
Ripoll, Ana
De Giusti, Armando Eduardo
author_role author
author2 Chichizola, Franco
Naiouf, Marcelo
Ripoll, Ana
De Giusti, Armando Eduardo
author2_role author
author
author
author
dc.subject.none.fl_str_mv Ciencias Informáticas
Parallel
Modeling and prediction
topic Ciencias Informáticas
Parallel
Modeling and prediction
dc.description.none.fl_txt_mv This paper discusses automatic mapping methods for concurrent tasks to processors applying graph analysis for the relation among tasks, in which processing and communicating times are incorporated. Starting by an analysis in which processors are homogeneous and data transmission times do not depend on the processors that are communicating (a typical case in homogeneous clusters), we progress to extend the model to heterogeneous processors having the possibility of different communication levels, applicable to a multicluster. Some results obtained with the model and future work lines are presented, particularly, the possibility of obtaining the required optimal number of processors, keeping a constant efficiency level.
Facultad de Informática
description This paper discusses automatic mapping methods for concurrent tasks to processors applying graph analysis for the relation among tasks, in which processing and communicating times are incorporated. Starting by an analysis in which processors are homogeneous and data transmission times do not depend on the processors that are communicating (a typical case in homogeneous clusters), we progress to extend the model to heterogeneous processors having the possibility of different communication levels, applicable to a multicluster. Some results obtained with the model and future work lines are presented, particularly, the possibility of obtaining the required optimal number of processors, keeping a constant efficiency level.
publishDate 2007
dc.date.none.fl_str_mv 2007-04
dc.type.none.fl_str_mv info:eu-repo/semantics/article
info:eu-repo/semantics/publishedVersion
Articulo
http://purl.org/coar/resource_type/c_6501
info:ar-repo/semantics/articulo
format article
status_str publishedVersion
dc.identifier.none.fl_str_mv http://sedici.unlp.edu.ar/handle/10915/9526
url http://sedici.unlp.edu.ar/handle/10915/9526
dc.language.none.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv info:eu-repo/semantics/altIdentifier/url/http://journal.info.unlp.edu.ar/wp-content/uploads/JCST-Mar07-7.pdf
info:eu-repo/semantics/altIdentifier/issn/1666-6038
dc.rights.none.fl_str_mv info:eu-repo/semantics/openAccess
http://creativecommons.org/licenses/by-nc/3.0/
Creative Commons Attribution-NonCommercial 3.0 Unported (CC BY-NC 3.0)
eu_rights_str_mv openAccess
rights_invalid_str_mv http://creativecommons.org/licenses/by-nc/3.0/
Creative Commons Attribution-NonCommercial 3.0 Unported (CC BY-NC 3.0)
dc.format.none.fl_str_mv application/pdf
39-44
dc.source.none.fl_str_mv reponame:SEDICI (UNLP)
instname:Universidad Nacional de La Plata
instacron:UNLP
reponame_str SEDICI (UNLP)
collection SEDICI (UNLP)
instname_str Universidad Nacional de La Plata
instacron_str UNLP
institution UNLP
repository.name.fl_str_mv SEDICI (UNLP) - Universidad Nacional de La Plata
repository.mail.fl_str_mv alira@sedici.unlp.edu.ar
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