Timing synchronization and viterbi decoding for FPGA-based SDR platforms

Autores
Ayarde, Juan Martín; Tamagnone, Gabriel; Corral- Briones, Graciela
Año de publicación
2019
Idioma
inglés
Tipo de recurso
documento de conferencia
Estado
versión publicada
Descripción
Fil: Ayarde, Juan Martín. Universidad Nacional de Córdoba. Laboratorio de comunicaciones digitales; Argentina.
Fil: Tamagnone, Gabriel. INVAP-SE. Bariloche; Argentina.
Fil: Corral- Briones, Graciela. Universidad Nacional de Córdoba. Laboratorio de comunicaciones digitales; Argentina.
In this paper we analyze the integration of a digital clock and data recovery with a Viterbi decoder and propose a new interface module that minimizes the detrimental effects of clock jitter on decoded data. The proposed interface avoids decoder idle times and the utilization of a faster clock, optimizing the power consumption. A detailed performance analysis shows that jitter effects on decoding data can be practically eliminate with an appropriate design of the proposed interface.
https://ieeexplore.ieee.org/document/8882145
Fil: Ayarde, Juan Martín. Universidad Nacional de Córdoba. Laboratorio de comunicaciones digitales; Argentina.
Fil: Tamagnone, Gabriel. INVAP-SE. Bariloche; Argentina.
Fil: Corral- Briones, Graciela. Universidad Nacional de Córdoba. Laboratorio de comunicaciones digitales; Argentina.
Telecomunicaciones
Materia
Digital-communication
Timing recovery
Clock jitter
TECHNOLOGY
Nivel de accesibilidad
acceso abierto
Condiciones de uso
Repositorio
Repositorio Digital Universitario (UNC)
Institución
Universidad Nacional de Córdoba
OAI Identificador
oai:rdu.unc.edu.ar:11086/560014
Acceder
id RDUUNC_298c51afbbb3d63f17bfc16d56a16c02
oai_identifier_str oai:rdu.unc.edu.ar:11086/560014
network_acronym_str RDUUNC
repository_id_str 2572
network_name_str Repositorio Digital Universitario (UNC)
spelling Timing synchronization and viterbi decoding for FPGA-based SDR platformsAyarde, Juan MartínTamagnone, GabrielCorral- Briones, GracielaDigital-communicationTiming recoveryClock jitterTECHNOLOGYFil: Ayarde, Juan Martín. Universidad Nacional de Córdoba. Laboratorio de comunicaciones digitales; Argentina.Fil: Tamagnone, Gabriel. INVAP-SE. Bariloche; Argentina.Fil: Corral- Briones, Graciela. Universidad Nacional de Córdoba. Laboratorio de comunicaciones digitales; Argentina.In this paper we analyze the integration of a digital clock and data recovery with a Viterbi decoder and propose a new interface module that minimizes the detrimental effects of clock jitter on decoded data. The proposed interface avoids decoder idle times and the utilization of a faster clock, optimizing the power consumption. A detailed performance analysis shows that jitter effects on decoding data can be practically eliminate with an appropriate design of the proposed interface.https://ieeexplore.ieee.org/document/8882145Fil: Ayarde, Juan Martín. Universidad Nacional de Córdoba. Laboratorio de comunicaciones digitales; Argentina.Fil: Tamagnone, Gabriel. INVAP-SE. Bariloche; Argentina.Fil: Corral- Briones, Graciela. Universidad Nacional de Córdoba. Laboratorio de comunicaciones digitales; Argentina.Telecomunicaciones2019info:eu-repo/semantics/conferenceObjectinfo:eu-repo/semantics/publishedVersionhttp://purl.org/coar/resource_type/c_5794info:ar-repo/semantics/documentoDeConferenciaapplication/pdf978-1-7281-2363-9http://hdl.handle.net/11086/560014enginfo:eu-repo/semantics/openAccessreponame:Repositorio Digital Universitario (UNC)instname:Universidad Nacional de Córdobainstacron:UNC2026-02-26T11:44:13Zoai:rdu.unc.edu.ar:11086/560014Institucionalhttps://rdu.unc.edu.ar/Universidad públicaNo correspondehttp://rdu.unc.edu.ar/oai/snrdoca.unc@gmail.comArgentinaNo correspondeNo correspondeNo correspondeopendoar:25722026-02-26 11:44:13.751Repositorio Digital Universitario (UNC) - Universidad Nacional de Córdobafalse
dc.title.none.fl_str_mv Timing synchronization and viterbi decoding for FPGA-based SDR platforms
title Timing synchronization and viterbi decoding for FPGA-based SDR platforms
spellingShingle Timing synchronization and viterbi decoding for FPGA-based SDR platforms
Ayarde, Juan Martín
Digital-communication
Timing recovery
Clock jitter
TECHNOLOGY
title_short Timing synchronization and viterbi decoding for FPGA-based SDR platforms
title_full Timing synchronization and viterbi decoding for FPGA-based SDR platforms
title_fullStr Timing synchronization and viterbi decoding for FPGA-based SDR platforms
title_full_unstemmed Timing synchronization and viterbi decoding for FPGA-based SDR platforms
title_sort Timing synchronization and viterbi decoding for FPGA-based SDR platforms
dc.creator.none.fl_str_mv Ayarde, Juan Martín
Tamagnone, Gabriel
Corral- Briones, Graciela
author Ayarde, Juan Martín
author_facet Ayarde, Juan Martín
Tamagnone, Gabriel
Corral- Briones, Graciela
author_role author
author2 Tamagnone, Gabriel
Corral- Briones, Graciela
author2_role author
author
dc.subject.none.fl_str_mv Digital-communication
Timing recovery
Clock jitter
TECHNOLOGY
topic Digital-communication
Timing recovery
Clock jitter
TECHNOLOGY
dc.description.none.fl_txt_mv Fil: Ayarde, Juan Martín. Universidad Nacional de Córdoba. Laboratorio de comunicaciones digitales; Argentina.
Fil: Tamagnone, Gabriel. INVAP-SE. Bariloche; Argentina.
Fil: Corral- Briones, Graciela. Universidad Nacional de Córdoba. Laboratorio de comunicaciones digitales; Argentina.
In this paper we analyze the integration of a digital clock and data recovery with a Viterbi decoder and propose a new interface module that minimizes the detrimental effects of clock jitter on decoded data. The proposed interface avoids decoder idle times and the utilization of a faster clock, optimizing the power consumption. A detailed performance analysis shows that jitter effects on decoding data can be practically eliminate with an appropriate design of the proposed interface.
https://ieeexplore.ieee.org/document/8882145
Fil: Ayarde, Juan Martín. Universidad Nacional de Córdoba. Laboratorio de comunicaciones digitales; Argentina.
Fil: Tamagnone, Gabriel. INVAP-SE. Bariloche; Argentina.
Fil: Corral- Briones, Graciela. Universidad Nacional de Córdoba. Laboratorio de comunicaciones digitales; Argentina.
Telecomunicaciones
description Fil: Ayarde, Juan Martín. Universidad Nacional de Córdoba. Laboratorio de comunicaciones digitales; Argentina.
publishDate 2019
dc.date.none.fl_str_mv 2019
dc.type.none.fl_str_mv info:eu-repo/semantics/conferenceObject
info:eu-repo/semantics/publishedVersion
http://purl.org/coar/resource_type/c_5794
info:ar-repo/semantics/documentoDeConferencia
format conferenceObject
status_str publishedVersion
dc.identifier.none.fl_str_mv 978-1-7281-2363-9
http://hdl.handle.net/11086/560014
identifier_str_mv 978-1-7281-2363-9
url http://hdl.handle.net/11086/560014
dc.language.none.fl_str_mv eng
language eng
dc.rights.none.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
dc.source.none.fl_str_mv reponame:Repositorio Digital Universitario (UNC)
instname:Universidad Nacional de Córdoba
instacron:UNC
reponame_str Repositorio Digital Universitario (UNC)
collection Repositorio Digital Universitario (UNC)
instname_str Universidad Nacional de Córdoba
instacron_str UNC
institution UNC
repository.name.fl_str_mv Repositorio Digital Universitario (UNC) - Universidad Nacional de Córdoba
repository.mail.fl_str_mv oca.unc@gmail.com
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score 13.176822

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